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Whether or not the PCB ink quality is excellent is in principle impossible to separate from the combination of the above major components. The excellent ink quality is a comprehensive manifestation of the formula's scientificity, advanced nature and environmental protection. It is reflected in: Viscosity is short for dynamic viscosity. Viscosity is generally expressed as the shear stress of the fluid flow divided by the velocity gradient in the flow layer direction, and the international unit is Pa/s (Pa.s) or milli-Pascal/sec. (mPa.S). In PCB production, the fluidity of the ink is driven by external forces. Conversion of viscosity units: 1Pa. S=10P=1000mPa. S=1000CP=10dpa. s Plasticity refers to the nature of the ink before it is deformed after the ink is deformed by external forces. The plasticity of the ink helps to improve the printing accuracy; Thixotropic inks are colloidal when they are left standing, and they are also known as thixotropy and sag resistance when they are exposed to changes in viscosity. The degree of fluidity (leveling) ink spreading to the surroundings under external force. Fluidity is the reciprocal of the viscosity, which is related to the plasticity and thixotropy of the ink. Plasticity and thixotropy are large, and fluidity is large; when the fluidity is large, the imprinting is easy to expand. Small liquidity, prone to netting, resulting in ink phenomenon, also known as reticulate; Viscoelasticity refers to the property that the ink is quickly rebounded by shearing the broken ink after the squeegee is scratched. It is required that the ink be deformed quickly, and ink rebounding can be used to facilitate printing. Dryness requires the ink to dry on the screen slower the better, and hope that the ink is transferred to the substrate, the faster the better; Fineness of pigment and solid material particle size, PCB ink is generally less than 10μm, the size of fineness should be less than one-third of the opening of mesh; When the drawability draws ink from the ink scoop, the extent to which the filamentous ink stretches without breaking is referred to as drawability. The ink is long and there are many filaments on the ink surface and the printing surface, which make the substrate and the printing plate dirty, and even unable to print; Ink transparency and hiding power For PCB inks, various requirements are also made for the transparency and hiding power of the ink, depending on the application and requirements. In general, line inks, conductive inks, and character inks all require high hiding power. The solder resist is more flexible. Chemical resistance of ink PCB inks have strict standards for the requirements of acids, alkalis, salts, and solvents, depending on the purpose of use; The physical properties of the ink PCB inks must be resistant to external scratches, thermal shocks, mechanical peeling, and a variety of stringent electrical performance requirements. The use of ink safety and environmental protection PCB inks require low toxicity, odorless, safe and environmentally friendly. Above we have summarized the basic performance of twelve PCB inks, and among them, in the actual operation of screen printing, the viscosity problem is closely related to the operator. The level of viscosity has a great relationship with silk screen printing. Therefore, in the PCB ink technical documentation and QC report, the viscosity is clearly marked, indicating under what conditions, what type of viscosity testing equipment and so on. In the actual printing process, if the viscosity of the ink is too high, it will cause difficulty in printing, serious jagged edges in the pattern, in order to improve the printing effect, it will add thinner to make the viscosity meet the requirements. However, it is not difficult to find that in many situations, in order to obtain the ideal resolution (resolution), no matter what viscosity you use, it will never be achieved. why? After in-depth study, it was discovered that ink viscosity is an important factor, but not the only one. There is another quite important factor - thixotropy. It is, it also affects the printing accuracy.

With the rapid development of electronic technology and the ever-shortening lifecycle of electronic products, higher and higher requirements have been put forward for PCB board assembly manufacturers. At the same time, global market competition has caused companies to face increasing international pressure. In order to survive and develop in the ever-changing market competition, modern PCB board assembly and manufacturing companies must adopt advanced production models to respond quickly to customer orders and provide high-quality, low-priced products. System integration and information integration (CIMS) are important technologies for improving enterprise management efficiency. Many companies have improved their level of production management and market competitiveness by continuously improving the automation of the placement line and introducing advanced enterprise-level management information systems (such as MRPII, ERP, etc.). However, general MRPII/ERP only manages enterprise-level resource plans. It can usually only process historical or forecast data, and cannot timely and accurately reflect the equipment status and production data of the current production site. At the same time, the on-site production equipment control system cannot transfer real-time production data to the upper-level resource management system. As a result, the enterprise resource planning layer lacks effective real-time information support for equipment, and the control link cannot be effectively optimized for scheduling and coordination [1]. Therefore, how to effectively combine the advanced production line control system with the enterprise-level production management information system and build a bridge between them to provide information communication is an urgent problem to be solved in the enterprise information construction. The Manufacturing Execution System (MES) solves this problem. The manufacturing execution system is a workshop-oriented management information system located between the upper level planning management system and the lower level production process control system [2]. It collects real-time data from the site to achieve optimal management of the entire production process from the order to the finished product. The PCB board assembly industry is a typical process manufacturing industry, and the equipment is highly automated. In order to fully tap the production potential of advanced equipment, optimize production behavior, and comprehensively improve the level of enterprise information management, the construction and application of MES is particularly important. This article is based on this idea, taking the dynamic quality control of the production process as the goal. According to the informationization status and characteristics of PCB board assembly companies, this paper proposes the construction and application of MES for PCB board assembly companies. 2 Status and Problems of Informatization in PCB Board Assembly Industry The production and manufacturing departments of modern PCB board assembly companies use a large number of automation equipment such as screen printing machines, placement machines, and reflow ovens, and basically all use industrial computers for control. Because the vendor's data interface and format are different from each other, device information cannot be shared in a centralized manner, and many "information isolated islands" are formed, and unified data analysis and processing cannot be realized. Although most devices have the ability to collect production process parameters, there is no network connection between the devices. The acquisition parameters can only be completed by manually viewing the display or disk backup, and cannot timely respond to the operation of the entire production line, resulting in poor real-time performance. At the same time, manual collection increases workload, reduces work efficiency, and accuracy cannot be guaranteed. The characteristics of the PCB board assembly industry determine that if there is a problem in one part, the entire batch of WIP will be scrapped. Therefore, it is necessary to monitor key production parameters in real time and sensitively and locate the wrong position, giving correct warning information. At the same time, some important parameters are automatically controlled and adjusted. Businesses are no longer satisfied with the simplest and most direct kanban information and need to dynamically monitor production activities based on real-time production data. On this basis, supplemented by quality process control methodological methods, scientific and systematic quality process analysis is conducted to support the judgment and timely processing of on-site production processes to improve production quality. There is a gap between the enterprise planning layer and the field device control (DCS), and a complete automatic/semi-automatic closed-loop business process cannot be achieved. As the PCB board assembly industry has the characteristics of small batch diversification and frequent changes of orders, production schedules and order requests cannot be timely delivered to on-site operations, and the workshop cannot timely adjust production schedules according to actual conditions. Reduce work efficiency, affect the delivery time. The stability of the delivery date is an important factor for the customer when purchasing. In addition, there are a large number of repetitive operations and error-prone processes in the on-site production process. For example, how to effectively manage the use status of a large number of on-site mounting racks, how to ensure the correctness of the loading position, and how to verify the correct correspondence between the release work order and the production BOM. The above issues are closely related to each other and affect each other, and their comprehensive consequences have seriously hampered the development of the company. In the increasingly fierce market competition environment, effective solutions will be of great significance to the PCB industry, and can obtain huge direct economic benefits. 3 Achieving Goals and Technical Routes The main construction goals of MES for PCB board assembly industry are: 1) Build an MES command and dispatch platform based on unified basic data and a unified system framework. Provides flexible and customizable user interfaces, business modules, and secondary development interfaces. 2) Research and development of MES systems that target the lean production management model and aim at dynamic quality control of the production process. By establishing a management control model for the SMT assembly line production process. Realize the real-time collection, monitoring and scheduling of key processes and equipment production and quality data. Realize integrated information management from product production task assignment, equipment management and on-site dynamic dispatch. 3) Provide dynamic quality analysis means, real-time quality problem alarms, promote the improvement of management level, and gradually shift the quality management mode from manual inspection to automatic processing and real-time control. Establish a quality knowledge base to promote the optimization of quality standards. Through the cycle of collection, analysis, processing, and accumulation, continuous improvement of quality is achieved. 4) Complete integration with the company's existing information system. According to the characteristics of the PCB board assembly industry, the functional module division of this program mainly includes data acquisition, monitoring and alarm, dynamic quality process control, process planning and scheduling, equipment management, and auxiliary production site management. The business relationship of each module is shown in the figure below: MES module business diagram 3.1 Data Acquisition, Monitoring and Alarming 3.1.1 Main Content The SMT production line's automation equipment group is built into the industrial network and connected with the internal office LAN. The software and hardware communication modules are installed on the control computer of the production line automation equipment to automatically collect real-time production data and transmit data to the data through the network. Processing center. And the data processing center shared information transmitted to the monitoring terminal through the network. 3.1.2 Data Acquisition Subsystem The [Data Acquisition Subsystem" is used to collect real-time production information from the SMT workshop field automation equipment and transmit it to the monitor interface to be displayed in the form of interface required by the user. At the same time, according to the needs of users, the collected data is stored, output, and other secondary processing. Alarm information is output according to the alarm condition. The "Data Acquisition Subsystem" considers integration with other DCS control systems in the SMT workshop. At present, most of the advanced equipments provide OPC/DDE interface. Therefore, in the data acquisition system, there should also be an interface program with OPC/DDE services to provide comprehensive read/write interactions so as to obtain instant production and quality information from the control system. . 3.1.3 Dynamic Quality Process Control <br> automatically import field data collection due to the large amount of data, the need for efficient and rapid means of analysis, quality analysis in real-time, control of the current production status. The Statistical Process Control module is to use statistical principles to collect and analyze quality inspection data, effectively control the production process, continuously improve the quality, reduce the defective product rate, and enhance the efficiency and competitiveness of the company. The quality analysis content provided by SPC includes change analysis, stability analysis, effective capability analysis, variation factor analysis, and process correlation analysis. Corresponding to this, the program provides a total of 13 kinds of statistical charts for counting type and measurement type: X-MR chart, XR chart, XS chart, P chart, NP chart, U chart, C chart, running chart, histogram, defect arrangement chart. , Arrangements, scatter plots, and DPMO (defects per million) control chart analysis based on PCB board assembly industry characteristics. Detailed scheduling and real-time adjustments to production planning and process planning and scheduling under 3.1.4 <br> support in the field to collect data. ERP as the company's high-level planning and decision planning system, the development of the workshop's main production plan, accurate to the daily production plan. MES uses JIT (Just In Time) as the core of the plan implementation and control system at the grassroots level to refine the daily production plan. Read the main production plan information from the ERP, determine the objective function and constraint conditions according to the order type, production mode, etc., select the scheduling algorithm, establish the scheduling rules, generate a detailed production plan, and implement the production organization at the execution level. In order to achieve the real-time performance of SMT pipeline production scheduling, the scheduling algorithm requires high accuracy, short calculation cycle, and simple calculation process. The desired scheduling period is determined in minutes or the arrival of a new task (bottleneck). According to the actual situation of the enterprise production line and other human factors, such as flexible scheduling, manual adjustment methods, and emergency scheduling solutions. After the execution of the plan is completed, the data collection subsystem feeds back feedback to the ERP. 3.1.5 Device Management Device Management is responsible for managing <br> workshop SMT assembly line equipment information, it gets real-time operating information from the data acquisition system. Through the statistical analysis of these information, the utilization of the equipment is obtained. At the same time, the equipment information can be called by the process planning and dispatching system. The tasks of equipment management are mainly implemented by workshop equipment management departments and production departments. It mainly includes maintenance of basic information data, maintenance of business information data, and status information data. According to functional requirements, the equipment management module mainly includes the following parts: equipment file management, equipment change management, equipment inspection management, equipment maintenance management, equipment maintenance management, equipment lubrication management, equipment operation management, equipment status statistics and analysis, equipment inquiries, etc. . 3.1.6 Auxiliary production site management is used to simplify the on-site operation of the workshop and assist the daily management functions of the SMT production workshop. include: 1) Feed Management Module: Maintain the basics and usage information of the racks to improve the management efficiency of the racks. It is convenient to inquire information on the status, maintenance records, maintenance records, scrap records, and online details of all racks. 2) Reload comparison module: Compare the refueling of the production line, confirm whether it meets the requirements of the current station, and record the refueling behavior, which is conducive to the query of refueling information. 3) Work Order Comparison Module: Through the comparison of the production BOM data file and the work order file, the BOM material quantity is summarized, the difference information is found, and the correctness of the processing is ensured. 4) Mounter program verification and optimization module: Extract coordinate data from CAD system, generate corresponding patch files, correct program problems, optimize placement path, and ensure the correctness of placement. 5) ERP interface module: completes the common interface with the enterprise's existing ERP system, realizes data exchange and sharing with ERP software, dynamically inquires and displays production plan information, and promptly returns completion status. 3.2 Acquisition Drive Development In order to optimize the configuration, enterprises generally come from multiple manufacturers when they build SMT production lines. At present, there are a wide variety of SMT production equipment on the market. Different equipments and even different models of the same equipment have different data interface modes. General data collection methods include: using industry-wide protocol acquisition, acquisition through a device-defined communication protocol, and acquisition through the device control system interface. In addition, you can also add a capture card to collect data. This section takes a typical SMT production line as an example to discuss the above several acquisition methods. 3.2.1 Screen Printer Data Acquisition Screen printing is the process of applying solder paste (or curing glue) onto a PCB board. DEK automatic screen printing machine as an example (such as: DEK265LT, DEK265HORIZON) to achieve data acquisition, acquisition parameters include: production models, production numbers, printing methods, squeegee pressure, squeegee speed, separation speed, cycle time, printing direction. This module collects screen printing machine data through the industry common protocol. The DEK screen printer controls the device through the connection between the Machine PC and the Machine Controller. The Machine PC is an industrial control computer and uses the Intel Pentium series CPU to run the corresponding control and monitoring software on it. The Machine Controller implements specific device control and communicates with the Machine PC through the Next Move Card. The control system of the screen printing machine is relatively simple compared with the placement machine and adopts the control of the main board. The DEK screen printer has a host communication function that conforms to the open standard GEM/SECS II. The GEM/SECS II agreement is an initiative drafted by the International Association for Semiconductor Equipment and Materials (SEMI) with the aim of harmonizing control systems and equipment from different vendors. The communication standard between the manufacturing equipment and the master computer is defined by the GEM/SECSII, SEMI E30, and E37 (HSMS) protocols [2]. Devices with GEM-compatible interfaces can be easily integrated into the enterprise's CIM policy. The GEM/SECS II (TCP/IP) host communication function facilitates integration of silk screen resources throughout the entire production line. The SEMI-related protocol is used to write the communication driver to collect data responses between the driver and the device. At the same time, it is necessary to open the corresponding Host Comm switch to the Enabled state on the main screen of the screen printer. It is worth noting that the GEM communication board of the general screen printer is not configured by default and needs to be installed separately. 3.2.2 SMT data acquisition SMD is the process of attaching SMD devices to PCBs. It is a key process for SMT assembly lines. The placement machine has complex control parameters and high precision requirements. It is the focus of the program for collecting equipment objects. Take Matsushita Panasert (MSF, MV2VB, MSR), YAMAHA (YV88II, YV100II) placement machines as examples. The collected contents include production information, mounting information, nozzle information, feeder information, and program information. The key parameters are production number, downtime, working hours, work efficiency, number of picks, number of placements, and number of throws. According to different analysis conditions such as suction nozzle, rack, and time period, the adsorption rate, the mounting rate is too low, and the output of a certain model is reduced. 1) Through the device monitoring software interface to collect the patch device using DOS operating system (such as YAMAHA YV88II, YV100II) can communicate with the COM port of the mounter through the offline software, the acquisition driver obtains the corresponding acquisition directly from the process file generated by the offline software data. Another method is to install a serial communication program on the device, communicate with the serial program on the collection server in the DOS state, and send the process data to the collection server for monitoring and storage. For example: YAMAHA SMT process data is a PDT format text file. The entire document is divided into three parts: HEAD, HEAD and COMP. After collecting the server, it can be directly decomposed by the format. 2) Collecting through the device's self-defined communication protocol Panasonic's Panasert SMT is a control system that uses the motherboard as its core and uses a card structure. Panasert placement machine uses P8000 control box, which is composed of HMI and MMC control modules. The Panasert placement machine provides a 25-pin RS232 serial port for host communication, which itself is used in the networking of information systems (such as Panacim's Pamacim, Unicam's Unicam, etc.). Through the Matsushita Host Communication protocol, it provides a two-way response communication between the device and the host. The communication instructions include start and stop positions, length segments, and data segments. To implement data communication, it is necessary to set the placement machine to the Online state. The placement machine generally provides three working states: Auto, Semi, and Manual. The Online state can be set only in the Auto state, and Offline is automatically set in the other two states. Therefore, real-time acquisition of relevant data can only be achieved in the Auto state. However, it is not possible to perform Step and other debugging work in the Auto state. Therefore, the Auto state is used during production monitoring, and the semi or manual state is switched over during maintenance and inspection. The placement machine provides serial communication speed ranging from 4800 to 19200bps according to different models and user settings [3]. 3.2.3 Reflow oven data acquisition The reflow soldering process warms the component board to melt the solder paste and achieve electrical connection between the device and the PCB board pad. Take the HELLER 1500W~1809W series as an example for reflow oven data acquisition. The collected data includes the furnace temperature (set value, actual value) and belt speed in each zone. At the same time, according to the time interval, the trend line graph of the furnace temperature is plotted to indicate that the furnace temperature is too high. This module collects data through the device control system interface. HELLER reflow oven is controlled by PC. Its control mechanism includes ENCODER (decoder), KBLC card (speed control card), CONTROLLER card (main control card), and MOTOR (motor). The PC and the main control card communicate through the COM port, collect device information, and issue control commands. The entire control route is closed-loop control. By analyzing the HELLER reflow oven control system, the Heller Comm OLE Control module provides the control and collection functions of the reflow oven in the form of COM controls. The acquisition answering program is installed on the reflow oven control computer, and the real-time data is transmitted through the non-blocking SOCK connection and the acquisition driver on the remote acquisition server. Through a multi-threaded approach, a collection server can simultaneously connect multiple reflow ovens for data acquisition. 4 Economic Indicators According to the site implementation and application experience of a domestic company in the past two years, the implementation of this project can achieve the following economic goals: 1) Monitor the quality of the production process, complete the analysis and correct abnormalities in advance, reduce downtime, increase equipment utilization, and increase processing capacity by about 10% annually; 2) Monitor production progress, rationally arrange production plans, reduce the number of machine conversions and stop time, increase production, and increase processing capacity by about 10% annually; 3) Decrease the management fee by 5% every year. After the implementation of the project, the annual output value will increase by 15%, cost and cost savings will be 5%, and a total of 30% economic benefit will be generated each year. 5 Summary 1) At present, the MES system is still in the exploration stage in China. Truly mature and common products and successful implementation cases are few, and implementation of MES is not one-sided. When an enterprise implements MES, do not follow the MES system definition. Should be based on their actual situation, careful analysis and reasonable planning. For the PCB assembly industry, assembly line equipment is highly automated. Implementation of MES can be used as a starting point for data acquisition and monitoring. On this basis, implementation of on-site data quality analysis, scheduling and other modules can be effective. 2) The MES system is a bridge of information communication between production activities and management activities, and serves as a link between the entire enterprise information integration system. The ERP system that breaks away from MES will not be able to quickly organize production according to market demand. Therefore, the MES system should handle the interface with the upper ERP system. 3) Agile production is the core of advanced manufacturing model. It is difficult for traditional MES solutions to meet this requirement. MES for agile manufacturing must have good integrability, configurability, and adaptability. Adaptability, Extensibility, and Reliability [4]. Therefore, many foreign organizations and research institutes have begun to study MES for agile manufacturing [5].

This article explains the difference between PCB positive and negative, PCB positive negative output, manufacturing process difference and difference, and PCB negative use, what are the benefits, etc., you can find the answer here. PCB Negative Output Process What is the difference between PCB positive and negative film----The difference between PCB positive and negative: PCB positives and negatives are the opposite of the manufacturing process. The effect of the PCB positive film: wherever the line is drawn, the copper of the printed board is retained, and the place where no line is drawn is removed. The signal layer such as the top layer and the bottom layer is the positive film. The effect of the PCB negative film: Wherever the line is drawn, the copper of the printed board is removed, and the place where no line is drawn is preserved. Internal Planes layer (internal power/ground layer) (internal power layer) for arranging power and ground. The traces or other objects placed on these levels are copper-free areas, ie the working layer is negative. PCB Negative Output Process What is the difference between PCB positive and negative film----What is the difference between PCB positive and negative output? PCB negative output print Negative film: Generally speaking, we are talking about the tenTIng process, and the liquid used is acid etching. Negative film is because after the film is made, the desired line or copper surface is transparent, and the unnecessary part is black or brown. After exposure by the line process, the transparent part is chemically affected by the light of the dry film resist. Hardening, the subsequent development process will wash away the dry film without hardening, so only the dry film is etched away in the etching process to wash away part of the copper foil (the black or brown part of the film), while leaving the dry film is not Washing out the line that belongs to us (the transparent part of the film), after leaving the film, we leave the line we need. In this process, the film should be covered by the hole, and the exposure requirements and requirements for the film are slightly higher. Some, but the process of its manufacture is fast. Positive film: Generally speaking, we are talking about the pattern process, and the liquid used is alkaline etching. If the positive film is viewed from the negative film, the desired line or copper surface is black or brown, and the part is transparent. Similarly, after the line process exposure, the transparent part is chemically affected by the light of the dry film resist. Hardening, the next development process will wash away the dry film without hardening, followed by the process of tin-lead plating, plating the tin-lead on the copper surface washed by the dry film of the previous process (development), and then removing the film. Action (removal of dry film hardened by light), and in the next process etching, bite off the copper foil without tin-lead protection (the transparent part of the film) with alkaline syrup, and the rest is the line we want (negative film) Black or brown part). PCB Negative Output Technology What is the difference between PCB positive and negative film----What are the benefits of PCB positive film, which are mainly used? Negative film is used to reduce the file size and reduce the amount of calculation. The place where there is copper is not displayed, and the place where there is no copper is displayed. This can significantly reduce the amount of data and computer display burden in the formation power layer. However, the current computer configuration is no longer a problem for this amount of work, I feel that it is not recommended to use negative film, it is easy to make mistakes. The pad is not designed to have a short circuit or something. If the power supply is convenient, there are many methods. The positive film can also be easily divided by other methods. It is not necessary to use a negative film.

In high-speed analog signal chain design, printed circuit board (PCB) layout requires consideration of many options. Some options are more important than others, and some options depend on the application. The final answer is different, but in all cases, the design engineer should try to eliminate the error of the best practice, not to over-calculate every detail of the layout and wiring. Here is an article written by Rob Reeder, an experienced system application engineer at ADI, "High Speed ADC PCB Layout and Wiring Tips." An article written by Rob Reeder**** believes this article will be helpful to everyone's high-speed design projects. Exposed pad The exposed pad (EPAD) is sometimes overlooked, but it is very important for the performance of the signal chain and adequate heat dissipation of the device. The exposed pad, which Analog Devices calls pins 0, is the pad under most of today's devices. It is an important connection where all internal ground of the chip is connected to the center point below the device. I wonder if you have noticed that the lack of ground pins in many converters and amplifiers today is due to the exposed pad. The key is to properly secure (ie, solder) this pin to the PCB for reliable electrical and thermal connections. If this connection is not firm, there will be confusion. In other words, the design may not work. Make the best connection There are three steps to using the exposed pad to achieve the best electrical and thermal connections. First, if possible, the exposed pad should be replicated on each PCB layer. The purpose of this is to form a dense thermal connection with all ground and ground planes for rapid heat dissipation. This step is related to high power devices and applications with a high number of channels. Electrically, this will provide good equipotential bonding for all ground planes. It is even possible to replicate the exposed pad on the bottom layer (see Figure 1), which can be used as a decoupling heat sink ground and where the bottom side heat sink is mounted. Second, divide the exposed pad into multiple identical parts, like a chessboard. Use a screen cross grid on the exposed exposed pad, or use a solder mask. This step ensures a solid connection between the device and the PCB. In the reflow assembly process, it is impossible to determine how the solder paste flows and ultimately connect the device to the PCB. Connections may exist but are unevenly distributed. You may only get one connection, and the connection is small, or worse, at the corner. Dividing the exposed pad into smaller sections ensures that each area has a connection point for a more rugged, uniformly connected exposed pad (see Figure 2 and Figure 3). Finally, you should make sure that all parts have vias connected to ground. Each area is usually large enough to place multiple vias. Before assembly, be sure to fill each via with solder paste or epoxy resin. This step is very important to ensure that the exposed pad solder paste will not reflow into these via holes and affect proper connection. Finally, you should make sure that all parts have vias connected to ground. Each area is usually large enough to place multiple vias. Before assembly, be sure to fill each via with solder paste or epoxy resin. This step is very important to ensure that the exposed pad solder paste will not reflow into these via holes and affect proper connection. Decoupling and layer capacitance Sometimes engineers ignore the purpose of using decoupling, and only distribute a lot of capacitors of different sizes on the board, so that the lower impedance power supply is connected to ground. But the problem remains: how much capacitance is needed? Many related literature indicate that many capacitors of different sizes must be used to reduce the power transmission system (PDS) impedance, but this is not entirely correct. Conversely, simply selecting the correct size and type of capacitor can reduce the PDS impedance. Consider designing a 10 mΩ reference layer as shown in Figure 4. As the red curve shows, many different values of capacitance are used on the system board, 0.001 μF, 0.01 μF, 0.1 μF, and so on. This of course can reduce the impedance in the 500 MHz frequency range, but look at the green curve. The same design uses only 0.1 μF and 10 μF capacitors. This proves that if you use the correct capacitor, you don't need so much capacitance. This also helps to save space and material (BOM) costs. Note that not all capacitors are [born equally", even if the same supplier has different processes, sizes, and styles. If the correct capacitor is not used, whether it is multiple capacitors or several different types, it will have a negative effect on the PDS. The result may be an inductive loop. Improper placement of capacitors or use of different processes and types of capacitors (and therefore different responses to the frequencies within the system) may cause resonances between each other (see Figure 5). It is important to understand the frequency response of the type of capacitor used by the system. The choice of capacitors will make it harder to design low-impedance PDS systems. PDS high-frequency layer capacitance To design a qualified PDS, you need to use a variety of capacitors (see Figure 4). The typical capacitance used on the PCB can only reduce the impedance of the DC or near-DC frequency to about 500 MHz. Above 500 MHz, the capacitance depends on the internal capacitance formed by the PCB. Note that close overlap of the power plane and ground plane will help. A PCB stack structure that supports larger layer capacitors should be designed. For example, a six-layer stack may include a top signal layer, a first ground plane, a first power plane, a second power plane, a second ground plane, and a bottom signal layer. It is specified that the first ground layer and the first power layer are close to each other in the stacked structure, and the two layers have a pitch of 2 to 4 mils to form a natural high-frequency layer capacitance. The biggest advantage of this capacitor is that it is free, just specify in the PCB manufacturing notes. If you have to split the power plane and there are multiple VDD power rails on the same layer, use as large a power plane as possible. Do not leave empty holes and pay attention to sensitive circuits. This will maximize the capacitance of the VDD layer. If the design allows additional layers (in the example above, from six to eight layers), two additional ground planes should be placed between the first and second power planes. In the case where the core pitch is also 2 to 3 mils, the intrinsic capacitance of the laminated structure will be doubled at this time (see Fig. 6 for an example). This structure is easier to design than adding more discrete high frequency capacitors to keep the impedance low at high frequencies. The task of the PDS is to minimize the voltage ripple generated in response to the supply current demand, which is important but often overlooked. All circuits need current, some circuits require more, and some circuits need to provide current at a faster rate. The use of fully decoupled, low-impedance power planes or ground planes, and good PCB stackups help minimize voltage ripple due to circuit current requirements. For example, depending on the decoupling strategy used, if the system design has a switching current of 1 A and the PDS impedance is 10 mΩ, the maximum voltage ripple is 10 mV. The calculation is simple: V = IR. With a perfect PCB stack, it can cover the high frequency range while using conventional decoupling around the power entry starting point and high power or inrush current devices to cover the low frequency range (<500 MHz). This ensures that the PDS impedance is lowest across the entire frequency range. It is not necessary to configure the capacitors everywhere; the placement of the capacitors against each IC destroys many manufacturing rules. If such drastic measures are needed, there are other problems with the circuit. Layer coupling Some layouts inevitably have overlapping circuit layers (see Figure 8). In some cases, it may be a sensitive analog layer (such as power, ground, or signals), and the lower layer is a high-noise digital layer. This is often overlooked because the high-noise layer is in another layer - below the sensitive simulation layer. However, a simple experiment can prove that this is not the case. Taking a certain level as an example, signals are injected at any layer. Then connect another layer and cross-couple this adjacent layer to the spectrum analyzer. The amount of semaphores coupled to adjacent layers is shown in Figure 8. Even though the distance is 40 mils, it is still a capacitance in some sense, so at some frequencies it will still couple signals to adjacent layers. An example of this is shown. For example, suppose a high-noise digital layer on one level has a high-speed switching 1 V signal. This means that the other layer will see a 1 mV coupling (approximately 60 dB isolation). For a 12-bit ADC with a 2-V pp full-scale swing, this is a 2 LSB coupling. This may not be a problem for a particular system, but it should be noted that if the sensitivity of the system is increased by two bits, from 12 bits to 14 bits, the sensitivity of this coupling will only increase by a factor of four, ie 8 LSBs. Ignoring this type of cross-layer coupling may invalidate the system or weaken the design. It must be noted that the coupling between the two layers may be beyond imagination. This should be taken into account when noise spurious coupling is found within the target spectrum. Sometimes the layout determines unintended signals or layers should be cross-coupled to different layers. Also, be aware of this when debugging sensitive systems. This problem may appear on the following layer. Separate ground The question most frequently asked by analog signal chain designers is: Should the ground plane be divided into AGND and DGND ground planes when using an ADC? The simple answer is: as the case may be. The detailed answer is: usually not separated. Why not? Because in most cases, blindly separating the ground plane will only increase the inductance of the return path, it will bring more harm than good. From the formula V = L(di/dt), it can be seen that the voltage noise increases as the inductance increases. As the inductance increases, the PDS impedance the designer tries to push down increases. As the need to increase the ADC sampling rate continues to increase, the way to reduce the switching current (di/dt) is limited. Therefore, keep these ground connections unless you need to separate the ground planes. The key is that the circuit segmentation should be reasonable, so there is no need to separate the ground plane, as shown in Figure 9. Note that if the layout allows you to keep the circuit in its own area, there is no need to separate the ground plane. This division provides star grounding, confining the return current to specific circuit sections. Due to the size limitation, when the circuit board cannot achieve a good layout split, it is necessary to separate the ground plane. This may be to meet traditional design requirements or dimensions, and dirty bus power or high noise digital circuits must be placed in certain areas. In this case, separating the ground plane is the key to good performance. However, for the overall design to be effective, these ground planes must be connected together somewhere in the board through a bridge or connection point. Therefore, the connection points should be evenly distributed on separate ground planes. Eventually, there will often be a connection point on the PCB that will be the best place for the return current to pass without degrading the performance or forcing the return current into the sensitive circuit. If this connection point is located near, in or near the converter, there is no need to separate the ground. Due to too many best options, layout considerations are always confusing. Technology and principles have always been part of the company's design culture. Engineers like to learn from the experience of previous designs. At the same time, the pressure to market makes designers unwilling to change or try new technologies. They stick to risk trade-offs until major problems arise in the system. Simple single grounding is the best at the board, module, and system level. Good circuit segmentation is the key. This also affects the layout of layers and adjacent layers. If the sensitive layer is above the high noise digital layer, be aware that cross-coupling may occur. Assembly is also important; manufacturing notes provided to the PCB workshop or assembly shop should be used to ensure a reliable connection between the exposed exposed pad of the IC and the PCB. Poor assembly often leads to poor system performance. Decoupling close to the power plane entry point and the VDD pin of the converter or IC is always advantageous. However, in order to increase the inherent high-frequency decoupling capacitance, close stacked power and ground planes should be used (pitch ≤ 4 mils). This method does not bring additional costs. It takes only a few minutes to update the PCB manufacturing notes. When designing high-speed, high-resolution converter layouts, it is difficult to take care of all the specific features. Each application is unique. I hope that the points outlined in this application note will help design engineers better understand future system designs.

PCB (Printed Circuit Board), the Chinese name for the printed circuit board, also known as printed circuit board, printed circuit board, is an important electronic component, is the electronic component support, is the electronic component of the electrical connection provider. Because it is made using electronic printing, it is called a "printed" circuit board. Since the development of the PCB industry in China in 1956, the development of the PCB industry has entered a period of 60 years. Today, the competition in the industry is extremely fierce, and the cost savings are the ones most profitable companies use. Traditional methods, but with the development of the B2B industry, network promotion methods favored by more and more companies, and competitive pressures within the industry are becoming increasingly huge, many PCB manufacturers have chosen other breakthrough points for profit, and there are more and more The company joined the network to promote this rank. Using [PCB" as a keyword to search in the [Product Directory" of China Manufacturing Network, a total of ten companies purchased [TopRank" services, namely Wenzhou Oulong Electric Co. , Ltd. , Sunthone Technology Circuit Ltd, Chi Tun Electronics, Mulda Electronics Co. , Ltd. , K-TEK Technology Limited, Zhejiang Zapon Electronic Technology Co. , Ltd, Shanghai Pu Chun Electronics Co. , Ltd. , Honya International Develop Limited and Fully Hong Electronics Co. , Ltd. (Data source date: 2011-5-31), a large number of PCB manufacturers have chosen senior member services of China Manufacturing Network. Comprehensive 2010 PCB PCB manufacturer's income rankings, as follows: PCB industry network promotion It can be found that the ten companies that purchased [TopRank" did not appear in the above table. It is not difficult to understand why companies like Tripod, Unimicron, TTM, and CMK are all old-fashioned PCB manufacturers who have their own fixed-term cooperation customers. And has occupied a certain market share and status in the industry, network promotion for these companies, the company's management may consider more. However, in addition to these old PCB manufacturers, in order to occupy a greater market share in the market and obtain a greater market position, to promote on the network, so that more buyers understand their own company, can be regarded as A good way for the company to achieve benefits. Therefore, for an already mature industry, seeking other marketing methods is critical and necessary for a company seeking development and survival. 12131415161718192021 © 2009-2019 Powered by Bossgoo.com

PCB numerical control drilling and milling machine is a typical point motion control system. It is the key equipment for the precision conduction hole processing of printed circuit boards. With the development of electronic products in the direction of miniaturization and miniaturization, the requirements for the aperture, line width, and line spacing of the vias are increasing. Correspondingly, the PCB numerical control system is developing in an open direction with high speed, high precision, high reliability, system integration, flexibility, and high intelligence. MPC08 economical four-axis motion controller is widely used in PCB numerical control drilling machines for its excellent performance. First of all, the movement mode of the PCB numerically controlled drilling machine is mainly point motion. Its key technical indicators require high speed and high precision. MPC08 mainly completes the point motion control, can quickly and accurately locate and drill in the instant, and then can quickly move to the next positioning hole on the side after leaving the PCB board surface after lifting, thus greatly improving the work efficiency of the PCB digital drilling machine. . The maximum output frequency of MPC08 is 4MHZ to meet the high speed requirements of PCB drilling machines. Second, the PCB drilling machine requires a large number of IO channels to monitor various device states and control output signals, and each MPC08 motion control card can control 16 universal inputs and 16 general-purpose outputs, while there are 17 dedicated input channels, also when not needed. Can be used as a universal input channel to fully meet the PCB drilling machine I / O channel requirements. In addition, MPC08 also provides users with a secondary development interface to meet the needs of the user's special function development.

The appearance and development of Printed Circuit Boards (PCBs) have brought significant changes to the electronics industry. It has become an indispensable component in various electronic devices and instruments. With the continuous development of screen printing technology, new screen printing materials, screen printing technologies and testing equipment for the PCB industry have been improved, making the current screen printing process technology adaptable to high-density PCB production. The application of screen printing in PCB manufacturing mainly has the following three aspects: a. Application of PCB surface solder mask; b. The application of the anti-corrosion and anti-electroplating layer during the transfer of PCB pattern; c. The surface of the PCB is quite different from that of the application layer. As the first two applications are difficult to achieve in technology, this article will be targeted to introduce, while the screen printing materials for the PCB process for a brief introduction. -, screen printing materials 1. Wire mesh screen is the most important part of the same printing plate, because it is the key to control the ink flowability and printing thickness, and it determines the durability and quality of the screen. In recent years, the introduction of some high-tension, monofilament, and plain-woven polyester screens has made screen printing widely used in the manufacture of SMT templates, printed circuit manufacturing technologies, and membrane switch manufacturing technologies. In addition, the excellent combination of screen and screen printing materials is also an important factor in the production of high quality, high precision printing plates. In order to ensure a good combination of screen and photosensitive materials, the traditional approach is to roughen and degrease the new screen, which will ensure screen quality and extend screen life. 2. The plate sensitization material plate printing plate photosensitive material is commonly used diazo sensitizer, photosensitive film and so on. Diazo-type emulsions are commonly used in screen printing screen printing. The photosensitive film has the characteristics of uniform thickness controllable layer, high resolution image knife, high definition, wear resistance, and strong adhesion to the screen, and has been widely used in character printing of printed boards. 3. The material of the frame net frame and the shape of the cross section are very important. If the strength of the frame is not enough relative to a certain frame size, the consistency of the tension cannot be guaranteed. Nowadays, high tension aluminum frames are generally used. 4. The following printing inks are mainly used to introduce some screen printing inks used in the PCB industry. The specific uses and characteristics are shown in Table 1. Second, the application of PCB surface solder mask Printed circuit board solder mask is a permanent protective layer, it not only has the function of welding, protection, improve insulation resistance and other effects, but also the appearance of the quality of the circuit board Great influence. Early solder mask printing uses the solder mask to make the same pattern, and then prints the UV-curable solder mask ink. After each printing, excess solder mask remains on the pad due to screen deformation, misalignment, etc. It takes a long time to come and save, and it consumes a lot of manpower and time. Liquid photo-resist masking inks do not require the production of screen patterns, using the same printing, contact exposure. This process has high alignment accuracy, strong solder mask adhesion, good soldering resistance, and high production efficiency. It has gradually replaced photo-curable inks. 1. Process Flow Solder Mask Negatives Positioning Holes Punching Plate Positioning Holes - Cleaning Printed Plates - Preparing an Ink for Printing on Both Sides - Pre-bake Exposure A developing a thermoset 2. Key process analysis (1) Pre-baking Table 1 Usage and characteristics of some PCS inks Variety Uses and characteristics Development type liquid resisting plating resist inks Used for multilayer PCB inner layer fabrication and fabrication of high-precision, high-frequency PCB resist patterns , Double-sided and single-sided PCB board resist pattern production. The exposure time is short, the development speed is high, the release is easy, and the plating resistance and the etching resistance are excellent. UV curable liquid resist inks are used for the fabrication of single-sided and non-metallized hole PCB resist patterns. Curing speed, excellent plating resistance and etching resistance. Developing liquid photosensitive solder resist ink for high density PCB insulation protection. With high development accuracy, wide exposure range, rapid development, heat and acid and alkali resistance, resistance to plating, moisture resistance, excellent adhesion with copper foil. UV Curing Type Solder Resist Inks UV-curing two-component type character inks are used for the insulation protection of general PCBs, and are excellent in heat and acid resistance, alkali resistance, plating resistance, and moisture resistance. For multilayer and single-sided printed board surface mark symbol layer. Strong adhesion, screen printing characters full, clear and beautiful. The purpose of the pre-baking is to evaporate the solvent contained in the ink to make the solder mask non-tacky. For the different inks, the pre-baking temperature and time are different. Prebake too high a temperature, or drying time is too long, it will lead to poor development, reduce the resolution; pre-baking time is too short, or the temperature is too low, will stick to the film in the exposure, during development, the solder mask will be subject to sodium carbonate solution The erosion causes the surface to lose luster or the solder mask expands and falls off. (2) Exposure exposure is the key to the entire process. For the positive image, when overexposed, due to scattering of light, the solder resist film on the edge of the pattern or line reacts with light (mainly the photosensitive polymer contained in the solder resist strand reacts with light) to form a residual film, thereby reducing the resolution. As a result, the developed image becomes smaller and the lines become thinner. If the exposure is insufficient, the result is opposite to the above, and the developed image becomes larger and the lines become thicker. This situation can be reflected in the test: the exposure time is long, the measured line width is a negative tolerance; exposure time is short, the measured line width is a positive tolerance. In the actual process, "Optical Energy Integrator" can be used to determine the optimal exposure time. (3) Adjustment of ink viscosity The viscosity of the liquid photosensitive resist ink is mainly controlled by the ratio of the hardener to the main agent and the amount of diluent added. If the amount of hardener is not enough, there may be an imbalance in ink characteristics. After the hardening agent is mixed, the reaction proceeds at room temperature and the viscosity changes as follows. Within 30min: Ink main agent and hardener have not been fully integrated yet, fluidity is insufficient, and the screen will be blocked during printing. 3min to 10h: The ink main agent and hardener have been fully blended with proper fluidity. After 10h: The reaction between the materials of the ink itself has been actively carried out, resulting in greater fluidity, poor printing, the longer the time after the hardening agent is mixed, the more fully the reaction of the resin and the hardener, and the ink gloss is also changed accordingly. it is good. In order to make the gloss of the ink even and the printability is good, it is better to start printing after the curing agent is mixed for 30 minutes. If the diluent is added too much, it will affect the heat resistance and hardenability of the ink. In a word, the viscosity adjustment of the liquid photosensitive resist ink is very important: the viscosity is over-regulated, the printing is difficult, the screen is easy to stick the network, the viscosity is too thin, and the amount of volatile solvent in the ink is more, which brings difficulties to the pre-curing. The viscosity of the ink is measured using a rotary viscometer. In production, it is also necessary to adjust the optimum value of the viscosity according to different inks and solvents. Third, the application of anti-corrosion and anti-electroplating layer in the PCB pattern transfer process In the manufacturing process of the printed circuit board, the pattern transfer is the key process, and the commonly used dry film process is used to transfer the printed circuit pattern. At present, the wet film is mainly used for the manufacture of inner-layer circuit patterns of multilayer printed boards and the production of outer-layer circuit patterns of double-sided and multi-layered poles. 1. Process before processing ~ screen printing ~ baking an exposure ~ development ~ anti-plating or anti-corrosion ~ to film ~ the next process 2. Analysis of key processes (1) Selection of coating methods The wet film coating methods include the same type of printing, roller coating, curtain coating, and dip coating. In these methods, the surface layer of the wet film made by the roll-coating method is not uniform, and it is not suitable for producing a high-precision printed board. The wet film surface layer made by the method of the Z curtain coating is uniform and the thickness can be precisely controlled, but The curtain coater coating equipment is expensive and suitable for mass production; the wet film surface layer made by the dip coating method has a thin thickness and poor plating resistance. According to the current PCB production requirements, the same printing method is generally used for coating. (2) Pre-treatment The coupling of the wet film and the printed board is accomplished by chemical bonding. Usually, the wet film is an acrylate-based polymer that is a free-moving polymerized acrylate group. Steel combination. This process adopts the method of photochemical cleaning and mechanical cleaning to ensure the above-mentioned bonding, so that the surface is free of oxidation, oil-free, and water-free traces. (3) Control of twist and thickness The relationship between ink viscosity and diluent is shown in Figure 1. As can be seen from the figure, at a point of 5%, the wet film has a twist of 150 PS, which is lower than the thickness of the print, which does not meet the requirements. Wet film printing does not add thinner in principle. If it is to be added, it should be controlled within 5%. The thickness of the wet film is calculated by the following formula: hw-[hs-(S×hs)]×P% where hw is the wet film thickness h−is the screen thickness; hs is the fill area ZP is the ink solids content . Taking a screen of 100 mesh as an example: screen thickness: 60 μm; open area: 30%; ink solids: 50%. Figure 1 Relationship between ink viscosity and diluent Thickness of wet film = [60-(60 x 70%)] x 50% = 9 μm When a wet film is used for corrosion resistance, its film thickness is generally required to be 15-20 μm; when used In the anti-plating, the film thickness is generally required for 2O-30μm. Therefore, when the wet film is used for anti-corrosion, it should be printed twice. At this time, the thickness is about 18 μm, which meets the requirement of anti-corrosion; when it is used for anti-electroplating, it should be printed three times, at this time, the thickness is about 27 μm, which is in accordance with the anti-plating film thickness. Claim. When the wet film is too thick, it is easy to produce shortcomings such as underexposure, short-term development, poor etching resistance, etc., and it will be eroded by the syrup when it is electroplated, resulting in dislocation phenomenon, high visual pressure, and easy generation of sticky film when the film is attached. When the film is too thin, there are disadvantages such as overexposure, poor plating insulation, release film, and occurrence of metal plating on the film layer. In addition, when the film is exposed too much, the film removal speed is also slow. IV. Conclusion With the development of screen printing technology, screen printing technology has become increasingly important in the printed circuit manufacturing industry. Its application not only improves the production efficiency of printed circuits, but also reduces the production of printed circuits. The cost also improves the quality of printed circuit board processing. On the other hand, due to the research, development and application of printed materials, especially the development of functional inks, the application fields of screen printing have been diversified and have been continuously expanded, such as silver paste printing in membrane switch manufacturing technology. ZSMT manufacturing technology, solder paste printing and template manufacturing ZPCB peelable ink applications. (Author: East China Institute of Electronics Engineering, 230033; Received: 2001-O3-26) 567891011121314 © 2009-2019 Powered by Bossgoo.com

Abstract: This article outlines the theory of thixotropy and leveling of PCB inks, introduces the development of domestic inks used in PCBs, and explains to readers the application of thixotropy and leveling in PCB inks. Keywords: thixotropy leveling viscosity shear force Anti-corrosion ink is used in the production of PCB to complete the material of the processing circuit pattern. Solder resist ink is an ink permanently left on the board surface. It not only has thermal shock resistance, corrosion resistance, corrosion resistance, good electrical properties, but also a surface decoration. The marking inks also serve as markers to illustrate and paint the effect of the Dragon Point. The history of development of printed boards in China for several decades is also the history of the development of printed board inks. The earliest inks used in single-panel circuits are self-made inks, and self-drying or drying inks based on thick paints, fillers, rosins and solvents. . In the mid-1970s, inks with bitumen as the main body appeared again, and the edges of the lines were improved. In the early 1980s, only professional factories used line inks. About solder mask inks, the thermosetting solder mask inks first produced by the Guangzhou Institute of Chemical Industry were marketed from the north to the south. With the rapid development of PCB technology and the deepening of reform and opening up, China's ink market is already blooming, with imported inks from the United States, Japan, West Germany, and the United Kingdom, while domestically produced Taiwan is predominant. In addition, Beijing, Guangdong, Hangzhou and Wuxi also have production. Whether it is imported ink or domestic ink must be tested, gradually find out the changes in its viscosity, performance testing when necessary, use its thixotropic and leveling performance to adjust their own operating procedures in order to be well used for production. Simply stated, the viscosity of the ink is a measure of resistance or resistance to flow. The concept of viscosity is described below using a simple model diagram. There is a layer of liquid between the two sheets, the upper sheet can move, the lower sheet is the fixed sheet, and the pitch is x. A force of size F acts on the upper movable sheet to make it move in the tangential direction and its speed is relative to At the bottom is v. When moving, the multi-layered liquid between the two sheets also moves, with the highest velocity at the top and the lowest velocity at the bottom, while the intermediate layer has a moderate velocity. The velocity gradient dυ/dx is defined as the shear rate (D) and its unit is l/s. The force acting on the top is divided by the area, that is, the force per unit area (F/A) is called the shear force (r), and its unit is Pa. The viscosity (η) is the ratio of the shearing force to the shearing rate, η=r/D, and its unit is Pa·S. That is, when the shear force is constant, the higher the viscosity of the liquid, the smaller the shear rate, that is, the smaller the internal rate of decline, the total can be obtained by the following three formulas, but these three formulas are also the quantitative relationship of Newtonian flow . It is also the three elements of rheology: Shear force, shear rate and viscosity. The so-called rheology is the science that describes the flow and deformation laws of objects under external forces. Shear rate (rate) D=dv/dx=u/x(S-1) Shear force (stress) r = F/A (N/m2 = Pa) Viscosity = η (shear stress/shear rate) = (F/A)/(V/X) = (PaS) Where A = area F = force V = speed (m/s) The most painful operator's headache in the layout of circuit boards is the fine control of the lines and the steepness of the edges of the lines. Honestly speaking, self-made inks in the 1970s could not solve the problem of thickening, thinning, and non-steep edges. (Of course, this is related to the screen-based graphics at the time, and it is also related to the manufacturing level of the screens at that time.) For this reason, the ink experts are based on the above-mentioned related theories. The first is to add a rheological agent to the ink so that it has a unique and stable structure, which can protect the dispersed pigment particles and form a thixotropic ink, which contributes to sagging control and maintains good leveling property and prevents dyes Settlement. When we print on a graphic screen, either a direct etching pattern or an anti-plating pattern requires a theoretical line width or line spacing, which requires the selection of inks with better thixotropic patterns. Its viscosity characteristics are: When the shear rate increases, the viscosity gradually decreases; a rational shear force release viscosity immediately reply. Before using the ink, dilute and stir it as needed. If it is manual mixing, it will be more laborious. As the time increases, it will gradually feel labor-saving. This is because the original structure of the ink has been destroyed when stirring, Increase, the original structure of the ink damage increases.) Stir and rest for a period of time, the structure destroyed in the static process gradually returns to the original value with the increase of the static time, which means that it is more suitable for screen printing at this time. . (usually more than 20 minutes is suitable for stationary) Bubbles with good thixotropic ink screen printing should also disappear within 5"~10". This is because at any shear rate its viscosity is lower than that of the unsheared original material and structural damage is also temporary. When the ink screen is printed on the surface of the board, the movement of the ink is far (shearing power) not reach the strength at the time of stirring, and the structure destruction is far less than the strength when stirring, so the viscosity of the ink screen when printed on the board It is far less than the drop when stirring, so the width of the printed pattern, although it needs to be still but the change will not be large, the following figure is a comparison of the two thixotropic results. Therefore, it should be noted that the increase in shear rate and the area covered by the viscosity curve during recovery is a measure of the thixotropic property. When we use optical imaging plating inks, different brands also have different results, and the same happens. Please see the following two figures for comparison: Therefore, it is very necessary to add a thixotropic coating additive to the ink to form an ideal thixotropic structure. This is also an important indicator required in PCB inks, but it should be pointed out that this increase in thixotropic performance is not endless but is just right in terms of production practices. In previous years, some brand inks had similar phenomena. Light emphasized the thixotropy of inks, increased the viscosity, scratched and printed holes in screen printing, blocked holes, and the film surface was rough, which affected the accuracy of lines and the normal operation of subsequent processes. . The property that the ink printed on the substrate is smooth and smooth is called leveling. When the ink is screen printed on the substrate, it will leave a trace of the grid, this trace can be reduced with the flow before undrained, when the leveling of the ink is poor, you can still see the traces of the slight grid with the naked eye, As shown in Figure 5: It should be noted that: the ink from the uneven flow to the smooth driving force is not the gravity but the surface tension. In the figure, λ is the distance between the two network lines, and ao (wavelength) is the amplitude. When 2ao is less than 1μm, the naked eye cannot see the difference. . Leveling can be expressed by the following formula: Δt=1g(ao)/(at)λ4η/226γx3 Where γ is the surface tension, ao is the initial amplitude, a1 is the amplitude at t, and Δt is the time required to level it to a1. As can be seen from the formula, when the viscosity of the ink is low, Δt is small, when the X value is high, Δt is small, and a small Δt value indicates that the leveling is good, so the leveling property is good and the viscosity is low. However, when △t is too small, most of the boards we printed are mostly trussed to bake and dry except for some single panels. At this time, the sag phenomenon may occur. See Figure 6. Weighing force causes ink. The phenomenon of flow is called sag. For ink sag, it refers to the tendency of the ink to flow to different degrees after the screen printing truss (standing up), but the viscosity is a measure of resistance to flow, it is a factor to prevent sagging, after analysis by mechanics, sagging The speed formula is as follows: V=ρgx2/2η Where ρ is the density of the ink, η is the viscosity, g is the constant of gravity acceleration, x is the thickness of the coating, so the viscosity is large, the sag speed is small; when the coating is thin, the sag speed is also small, the leveling and sagging of the ink are two Contradictory phenomena, good ink leveling requires that the viscosity be kept to a minimum for a sufficiently long period of time, and that there is sufficient time for the ink to level out and form a flat coating film, so sagging often occurs. On the contrary, it does not require complete sag. The viscosity of the ink is particularly high and it will result in little or no flow. For this purpose, an excellent rheological agent is needed, and the leveling and sagging are properly balanced, that is, the viscosity of the ink is temporarily low under the screen printing conditions, and is maintained at a low viscosity during the hysteresis recovery of the viscosity, showing a good flow Flatness; Once the leveling viscosity gradually returns, this prevents the sag phenomenon. To sum up, we need the leveling property of ink when we make multi-layer inner layer, single-panel, signage, grid, frame and other products. This leveling property means that the used ink has leveling and sagging. The balance, the requirement is that after screen printing can be quickly leveled, and when the board is erected and can not appear sag. In the case of double-decked apertures, both the directly printed pattern ink and the photoimaging ink must have good thixotropy, and the leveling requirements are much lower than those mentioned above. Therefore, the screen printing ink is generally not diluted. , And after stirring for a long time, make it fully restored. The purpose is to ensure that the graphics are accurate and do not block the ink. Source: Beijing Li Tuo Da Technology Co., Ltd. 567891011121314

In high-speed analog signal chain design, printed circuit board (PCB) layout requires consideration of many options. Some options are more important than others, and some options depend on the application. The final answer is different, but in all cases, the design engineer should try to eliminate the error of the best practice, not to over-calculate every detail of the layout and wiring. Here is an article written by Rob Reeder, an experienced system application engineer at ADI, "High Speed ADC PCB Layout and Wiring Tips." An article written by Rob Reeder**** believes this article will be helpful to everyone's high-speed design projects. Exposed pad The exposed pad (EPAD) is sometimes overlooked, but it is very important for the performance of the signal chain and adequate heat dissipation of the device. The exposed pad, which Analog Devices calls pins 0, is the pad under most of today's devices. It is an important connection where all internal ground of the chip is connected to the center point below the device. I wonder if you have noticed that the lack of ground pins in many converters and amplifiers today is due to the exposed pad. The key is to properly secure (ie, solder) this pin to the PCB for reliable electrical and thermal connections. If this connection is not firm, there will be confusion. In other words, the design may not work. Make the best connection There are three steps to using the exposed pad to achieve the best electrical and thermal connections. First, if possible, the exposed pad should be replicated on each PCB layer. The purpose of this is to form a dense thermal connection with all ground and ground planes for rapid heat dissipation. This step is related to high power devices and applications with a high number of channels. Electrically, this will provide good equipotential bonding for all ground planes. It is even possible to replicate the exposed pad on the bottom layer (see Figure 1), which can be used as a decoupling heat sink ground and where the bottom side heat sink is mounted. Second, divide the exposed pad into multiple identical parts, like a chessboard. Use a screen cross grid on the exposed exposed pad, or use a solder mask. This step ensures a solid connection between the device and the PCB. In the reflow assembly process, it is impossible to determine how the solder paste flows and ultimately connect the device to the PCB. Connections may exist but are unevenly distributed. You may only get one connection, and the connection is small, or worse, at the corner. Dividing the exposed pad into smaller sections ensures that each area has a connection point for a more rugged, uniformly connected exposed pad (see Figure 2 and Figure 3). Finally, you should make sure that all parts have vias connected to ground. Each area is usually large enough to place multiple vias. Before assembly, be sure to fill each via with solder paste or epoxy resin. This step is very important to ensure that the exposed pad solder paste will not reflow into these via holes and affect proper connection. Finally, you should make sure that all parts have vias connected to ground. Each area is usually large enough to place multiple vias. Before assembly, be sure to fill each via with solder paste or epoxy resin. This step is very important to ensure that the exposed pad solder paste will not reflow into these via holes and affect proper connection. Decoupling and layer capacitance Sometimes engineers ignore the purpose of using decoupling, and only distribute a lot of capacitors of different sizes on the board, so that the lower impedance power supply is connected to ground. But the problem remains: how much capacitance is needed? Many related literature indicate that many capacitors of different sizes must be used to reduce the power transmission system (PDS) impedance, but this is not entirely correct. Conversely, simply selecting the correct size and type of capacitor can reduce the PDS impedance. Consider designing a 10 mΩ reference layer as shown in Figure 4. As the red curve shows, many different values of capacitance are used on the system board, 0.001 μF, 0.01 μF, 0.1 μF, and so on. This of course can reduce the impedance in the 500 MHz frequency range, but look at the green curve. The same design uses only 0.1 μF and 10 μF capacitors. This proves that if you use the correct capacitor, you don't need so much capacitance. This also helps to save space and material (BOM) costs. Note that not all capacitors are [born equally", even if the same supplier has different processes, sizes, and styles. If the correct capacitor is not used, whether it is multiple capacitors or several different types, it will have a negative effect on the PDS. The result may be an inductive loop. Improper placement of capacitors or use of different processes and types of capacitors (and therefore different responses to the frequencies within the system) may cause resonances between each other (see Figure 5). It is important to understand the frequency response of the type of capacitor used by the system. The choice of capacitors will make it harder to design low-impedance PDS systems. PDS high-frequency layer capacitance To design a qualified PDS, you need to use a variety of capacitors (see Figure 4). The typical capacitance used on the PCB can only reduce the impedance of the DC or near-DC frequency to about 500 MHz. Above 500 MHz, the capacitance depends on the internal capacitance formed by the PCB. Note that close overlap of the power plane and ground plane will help. A PCB stack structure that supports larger layer capacitors should be designed. For example, a six-layer stack may include a top signal layer, a first ground plane, a first power plane, a second power plane, a second ground plane, and a bottom signal layer. It is specified that the first ground layer and the first power layer are close to each other in the stacked structure, and the two layers have a pitch of 2 to 4 mils to form a natural high-frequency layer capacitance. The biggest advantage of this capacitor is that it is free, just specify in the PCB manufacturing notes. If you have to split the power plane and there are multiple VDD power rails on the same layer, use as large a power plane as possible. Do not leave empty holes and pay attention to sensitive circuits. This will maximize the capacitance of the VDD layer. If the design allows additional layers (in the example above, from six to eight layers), two additional ground planes should be placed between the first and second power planes. In the case where the core pitch is also 2 to 3 mils, the intrinsic capacitance of the laminated structure will be doubled at this time (see Fig. 6 for an example). This structure is easier to design than adding more discrete high frequency capacitors to keep the impedance low at high frequencies. The task of the PDS is to minimize the voltage ripple generated in response to the supply current demand, which is important but often overlooked. All circuits need current, some circuits require more, and some circuits need to provide current at a faster rate. The use of fully decoupled, low-impedance power planes or ground planes, and good PCB stackups help minimize voltage ripple due to circuit current requirements. For example, depending on the decoupling strategy used, if the system design has a switching current of 1 A and the PDS impedance is 10 mΩ, the maximum voltage ripple is 10 mV. The calculation is simple: V = IR. With a perfect PCB stack, it can cover the high frequency range while using conventional decoupling around the power entry starting point and high power or inrush current devices to cover the low frequency range (<500 MHz). This ensures that the PDS impedance is lowest across the entire frequency range. It is not necessary to configure the capacitors everywhere; the placement of the capacitors against each IC destroys many manufacturing rules. If such drastic measures are needed, there are other problems with the circuit. Layer coupling Some layouts inevitably have overlapping circuit layers (see Figure 8). In some cases, it may be a sensitive analog layer (such as power, ground, or signals), and the lower layer is a high-noise digital layer. This is often overlooked because the high-noise layer is in another layer - below the sensitive simulation layer. However, a simple experiment can prove that this is not the case. Taking a certain level as an example, signals are injected at any layer. Then connect another layer and cross-couple this adjacent layer to the spectrum analyzer. The amount of semaphores coupled to adjacent layers is shown in Figure 8. Even though the distance is 40 mils, it is still a capacitance in some sense, so at some frequencies it will still couple signals to adjacent layers. An example of this is shown. For example, suppose a high-noise digital layer on one level has a high-speed switching 1 V signal. This means that the other layer will see a 1 mV coupling (approximately 60 dB isolation). For a 12-bit ADC with a 2-V pp full-scale swing, this is a 2 LSB coupling. This may not be a problem for a particular system, but it should be noted that if the sensitivity of the system is increased by two bits, from 12 bits to 14 bits, the sensitivity of this coupling will only increase by a factor of four, ie 8 LSBs. Ignoring this type of cross-layer coupling may invalidate the system or weaken the design. It must be noted that the coupling between the two layers may be beyond imagination. This should be taken into account when noise spurious coupling is found within the target spectrum. Sometimes the layout determines unintended signals or layers should be cross-coupled to different layers. Also, be aware of this when debugging sensitive systems. This problem may appear on the following layer. Separate ground The question most frequently asked by analog signal chain designers is: Should the ground plane be divided into AGND and DGND ground planes when using an ADC? The simple answer is: as the case may be. The detailed answer is: usually not separated. Why not? Because in most cases, blindly separating the ground plane will only increase the inductance of the return path, it will bring more harm than good. From the formula V = L(di/dt), it can be seen that the voltage noise increases as the inductance increases. As the inductance increases, the PDS impedance the designer tries to push down increases. As the need to increase the ADC sampling rate continues to increase, the way to reduce the switching current (di/dt) is limited. Therefore, keep these ground connections unless you need to separate the ground planes. The key is that the circuit segmentation should be reasonable, so there is no need to separate the ground plane, as shown in Figure 9. Note that if the layout allows you to keep the circuit in its own area, there is no need to separate the ground plane. This division provides star grounding, confining the return current to specific circuit sections. Due to the size limitation, when the circuit board cannot achieve a good layout split, it is necessary to separate the ground plane. This may be to meet traditional design requirements or dimensions, and dirty bus power or high noise digital circuits must be placed in certain areas. In this case, separating the ground plane is the key to good performance. However, for the overall design to be effective, these ground planes must be connected together somewhere in the board through a bridge or connection point. Therefore, the connection points should be evenly distributed on separate ground planes. Eventually, there will often be a connection point on the PCB that will be the best place for the return current to pass without degrading the performance or forcing the return current into the sensitive circuit. If this connection point is located near, in or near the converter, there is no need to separate the ground. Due to too many best options, layout considerations are always confusing. Technology and principles have always been part of the company's design culture. Engineers like to learn from the experience of previous designs. At the same time, the pressure to market makes designers unwilling to change or try new technologies. They stick to risk trade-offs until major problems arise in the system. Simple single grounding is the best at the board, module, and system level. Good circuit segmentation is the key. This also affects the layout of layers and adjacent layers. If the sensitive layer is above the high noise digital layer, be aware that cross-coupling may occur. Assembly is also important; manufacturing notes provided to the PCB workshop or assembly shop should be used to ensure a reliable connection between the exposed exposed pad of the IC and the PCB. Poor assembly often leads to poor system performance. Decoupling close to the power plane entry point and the VDD pin of the converter or IC is always advantageous. However, in order to increase the inherent high-frequency decoupling capacitance, close stacked power and ground planes should be used (pitch ≤ 4 mils). This method does not bring additional costs. It takes only a few minutes to update the PCB manufacturing notes. When designing high-speed, high-resolution converter layouts, it is difficult to take care of all the specific features. Each application is unique. I hope that the points outlined in this application note will help design engineers better understand future system designs. 12131415161718192021

The printed circuit board terminal block of the screw connection type has always occupied an important position in the electronic industry and has now become an important component of the printed circuit board. Its structured design takes into account the features of convenient wiring and reliable screw connections. The spring-connected printed circuit board terminals are divided into two types: pull spring connection and butterfly spring connection. The pull-back spring terminal and the screw terminal can replace each other, which greatly increases the flexibility. Regardless of the connection terminal, they all have the following advantages: 1. Large wiring capacity, can adapt to various wiring requirements. 2. The body of the thread clamp body is decoupled from the welding pin mechanically, that is, because the thread clamp body and the welding pin are not connected together, the torque when tightening the screw will not be transmitted to the welding point. 3. The solder pin has four prisms and the ends shrink and taper. When inserting the solder hole, it is prevented from turning at will. Use solder solution to dissolve the solder holes. 4. The solder pin is a copper alloy, and the solder pin has no dirt to ensure the long-term reliability of the solder. 5. Tinned solder pins for easy soldering. 6. With cooling channels. 7. The tip of the solder pin shrinks and is easy to install. Users can not only choose different parameters according to their needs, such as needle position and needle distance, but also can choose different wiring directions. In practical applications, the layout of the components (such as the position of the PCB in the housing) often limits the printed circuit board terminals. Printed circuit board terminals that provide a variety of different wiring orientations are undoubtedly of practical importance: horizontal, vertical, oblique, and frontal. The more choices offered, the more helpful the actual operation. Printed circuit board terminals can even provide multi-layer wiring (1st to 4th layer) terminals. The arrangement between the layers is very compact and staggers in the vertical direction by half a stitch. This terminal perfectly meets the compact, space-saving design needs of the layout. The screw connection terminal can be compatible with the spring connection terminal. The so-called compatibility means that both can be interchanged without changing the layout of the printed circuit board. This greatly improves the product's adaptability and reduces costs to a large extent.

There are many ways to solve EMI problems. Modern EMI suppression methods include: using EMI suppression coatings, selecting suitable EMI suppression components, and EMI simulation designs. This article starts from the most basic PCB layout, discusses the role and design skills of PCB layered stacking in controlling EMI radiation. Power bus Properly placing a capacitor of appropriate capacity near the power supply pin of the IC can make the output voltage of the IC jump faster. However, the problem is not here. Due to the finite frequency response of the capacitor, this makes it impossible for the capacitor to generate the harmonic power required to cleanly drive the IC output over the full frequency band. In addition, the transient voltage developed on the power bus forms a voltage drop across the inductor of the decoupling path, which is the primary source of common-mode EMI interference. How should we solve these problems? As far as the ICs on our boards are concerned, the power plane around the IC can be thought of as an excellent high-frequency capacitor that collects the energy that is leaked by discrete capacitors that provide high-frequency energy for clean outputs. In addition, the excellent power supply layer has a small inductance, so that the transient signal synthesized by the inductor is also small, thereby reducing common mode EMI. Of course, the wiring from the power plane to the IC power supply pin must be as short as possible because the rising edge of the digital signal is getting faster and faster, preferably directly to the pad where the IC power supply pin is located. This is discussed separately. To control common-mode EMI, the power plane must be decoupled and have a low enough inductance. This power plane must be a well-designed pair of power planes. Someone may ask, to what extent is it good? The answer to the question depends on the layering of the power supply, the material between the layers, and the operating frequency (ie, the function of the rise time of the IC). Typically, the power supply is layered at 6 mils and the mezzanine is FR4. The equivalent capacitance per square inch of power plane is approximately 75 pF. Obviously, the smaller the layer spacing, the larger the capacitance. There are not many devices with a rise time of 100 to 300 ps, but according to the current development speed of ICs, devices with a rise time of 100 to 300 ps will occupy a high proportion. For circuits with 100 to 300 ps rise time, the 3 mil layer spacing will no longer be suitable for most applications. At that time, it was necessary to use a layering technique with a layer spacing of less than 1 mil and to replace the FR4 dielectric material with a material having a high dielectric constant. Ceramics and ceramics now meet the design requirements of 100 to 300 ps rise time circuits. Although new materials and methods may be used in the future, for today's common 1 to 3 ns rise time circuits, 3 to 6 mil layer spacing and FR4 dielectric materials, it is usually sufficient to handle high-end harmonics and make the transient signal low enough. That said, common mode EMI can be reduced very low. The PCB layered stack design example given here will assume a layer spacing of 3 to 6 mils. Electromagnetic shielding From the perspective of signal routing, a good stratification strategy should be to place all signal traces in one or several layers, which are next to the power or ground plane. For the power supply, a good stratification strategy should be that the power layer is adjacent to the ground plane, and the distance between the power plane and the ground plane is as small as possible. This is what we call the "layering" strategy. Solving EMI problems by layered stacking of PCBs in PCB layout PCB stacking What kind of stacking strategy helps shield and suppress EMI? The following layered stacking scheme assumes that the supply current flows on a single layer, with single or multiple voltages distributed across different parts of the same layer. The case of multiple power planes is discussed later. 4-layer board There are several potential problems with 4-layer board design. First, the conventional four-layer board with a thickness of 62 mil, even if the signal layer is on the outer layer, the power supply and the ground layer are in the inner layer, the distance between the power supply layer and the ground layer is still too large. If the cost requirement is first, consider the following two alternatives to traditional 4-layer boards. Both of these solutions improve EMI suppression performance, but only for applications where the on-board component density is low enough and there is sufficient area around the component to place the required copper layer on the power supply. The first is the preferred solution. The outer layers of the PCB are all ground layers, and the middle two layers are signal/power layers. The power supply on the signal layer is routed with a wide line, which allows the path impedance of the supply current to be low and the impedance of the signal microstrip path to be low. From the perspective of EMI control, this is the best 4-layer PCB structure available. The outer layer of the second scheme takes the power and the ground, and the middle two layers take the signal. Compared with the traditional 4-layer board, the improvement is smaller, and the interlayer resistance is as poor as the traditional 4-layer board. If you want to control the trace impedance, the above stacking scheme must be very careful to place the traces under the power and ground copper islands. In addition, the copper or copper islands on the ground should be interconnected as much as possible to ensure DC and low frequency connectivity. 6-layer board If the density of the components on the 4-layer board is relatively large, it is preferable to use a 6-layer board. However, some laminate solutions in the 6-layer board design do not have a good shielding effect on the electromagnetic field, and have little effect on the reduction of the power bus bus transient signal. Two examples are discussed below. In the first case, the power and ground were placed on the 2nd and 5th layers respectively. Due to the high impedance of the copper of the power supply, it is very disadvantageous for controlling the common mode EMI radiation. However, from the point of view of signal impedance control, this method is very correct. In the second example, the power supply and the ground are placed on the 3rd and 4th layers respectively. This design solves the problem of the copper-clad impedance of the power supply. Due to the poor electromagnetic shielding performance of the first layer and the sixth layer, the differential mode EMI is increased. This design can solve the differential mode EMI problem if the number of signal lines on the two outer layers is the least and the trace length is short (shorter than the 1/20 of the highest harmonic wavelength of the signal). The suppression of differential mode EMI is particularly good when copper is filled with no components and no trace areas on the outer layer and the copper area is grounded (interval every 1/20 wavelength). As mentioned earlier, the copper area is connected to the internal ground plane at multiple points. The general-purpose high-performance 6-layer board design generally lays the first and sixth layers as the ground layer, and the third and fourth layers take the power and ground. Since there are two layers of the centered double microstrip signal line layer between the power supply layer and the ground layer, the EMI suppression capability is excellent. The disadvantage of this design is that the trace layer has only two layers. As mentioned earlier, if the outer traces are short and copper is laid in the no trace area, the same stack can be achieved with a conventional 6-layer board. Another 6-layer board layout is signal, ground, signal, power, ground, and signal, which enables the environment required for advanced signal integrity design. The signal layer is adjacent to the ground layer, and the power layer and the ground layer are paired. Obviously, the downside is that the stacking of layers is unbalanced. This usually causes troubles in manufacturing. The solution to the problem is to fill all the blank areas of the third layer with copper. If the copper layer density of the third layer is close to the power layer or the ground layer after copper filling, the board can not be strictly regarded as a structurally balanced circuit board. . The copper filled area must be connected to power or ground. The distance between the connecting vias is still 1/20 wavelength, and it is not necessary to connect everywhere, but ideally it should be connected. 10-layer board Since the insulating isolation layer between the multilayer boards is very thin, the impedance between the 10 or 12 layer circuit board layers and the layers is very low, and excellent signal integrity is completely expected as long as the layering and stacking are not problematic. It is difficult to process 12-layer boards at a thickness of 62 mils, and there are not many manufacturers that can process 12-layer boards. Since the signal layer and the loop layer are always separated by an insulating layer, the scheme of distributing the middle 6 layers in the 10-layer board design to take the signal line is not optimal. In addition, it is important to have the signal layer adjacent to the loop layer, that is, the board layout is signal, ground, signal, signal, power, ground, signal, signal, ground, and signal. This design provides a good path for signal current and its loop current. The proper routing strategy is that the first layer is routed along the X direction, the third layer is routed along the Y direction, the fourth layer is routed along the X direction, and so on. Intuitively looking at the traces, the first layer 1 and the third layer are a pair of layered combinations, the fourth layer and the seventh layer are a pair of layered combinations, and the eighth layer and the tenth layer are the last pair of layered combinations. When it is necessary to change the direction of the trace, the signal line on the first layer should be changed direction by "via" to the third layer. In fact, it may not always be possible to do so, but as a design concept, try to comply as much as possible. Similarly, when the direction of the signal is changed, it should pass through the vias from the 8th and 10th layers or from the 4th to the 7th. This routing ensures that the coupling between the forward path and the loop of the signal is tightest. For example, if the signal is routed on the first layer and the loop is on the second layer and only on the second layer, then the signal on the first layer is transferred to the third layer even by "via". The loop is still on the second layer, maintaining low inductance, large capacitance characteristics and good electromagnetic shielding performance. What if the actual route is not the case? For example, the signal line on the first layer passes through the via hole to the 10th layer. At this time, the loop signal has to find the ground plane from the 9th layer, and the loop current needs to find the nearest ground via (such as the grounding pin of the component such as resistor or capacitor). . If there is such a via in the vicinity, it is really lucky. If no such via is available, the inductance will increase, the capacitance will decrease, and EMI will increase. When the signal line must leave the current pair of wiring layers through the via to other wiring layers, the ground via should be placed near the via, so that the loop signal can be smoothly returned to the proper ground plane. For Layer 4 and Layer 7 layered combinations, the signal loop will be returned from the power or ground plane (ie, Layer 5 or Layer 6) because the capacitive coupling between the power and ground planes is good and the signal is easily transmitted. . Multi-power layer design If two power planes of the same voltage source need to output a large current, the board should be laid into two sets of power and ground planes. In this case, an insulating layer is placed between each pair of the power supply layer and the ground layer. This gives us two pairs of equal-impedance power buss that we want to divide the current. If the stack of power planes causes unequal impedances, the shunt is not uniform, the transient voltage will be much larger, and EMI will increase dramatically. If there are multiple supply voltages with different values on the board, multiple power planes are required accordingly. It is important to remember to create separate pairs of power and ground planes for different power supplies. In both cases, when determining the location of the paired power and ground planes on the board, remember the manufacturer's requirements for the balanced structure. to sum up Given that most engineers design boards that are 62 mils thick and have no blind vias or buried vias, the discussion of board delamination and stacking is limited to this. For boards with too much thickness difference, the layering scheme recommended in this paper may not be ideal. In addition, the processing method of the circuit board with blind holes or buried holes is different, and the layering method of this paper is not applicable. The thickness, via process, and number of layers in the board design are not critical to solving the problem. Excellent layered stacking ensures bypass and decoupling of the power busbars and minimizes transient voltages on the power or ground plane. The key to shielding the signal and the electromagnetic field of the power supply. Ideally, there should be an insulating isolation between the signal trace layer and its return ground plane, and the matching layer spacing (or more than one pair) should be as small as possible. Based on these basic concepts and principles, it is possible to design a board that always meets the design requirements. Now, IC's rise time is already short and will be shorter, and the techniques discussed in this article are essential to address EMI shielding issues. 12345678910

In high-speed analog signal chain design, printed circuit board (PCB) layout requires consideration of many options. Some options are more important than others, and some options depend on the application. The final answer is different, but in all cases, the design engineer should try to eliminate the error of the best practice, not to over-calculate every detail of the layout and wiring. Here is an article written by Rob Reeder, an experienced system application engineer at ADI, "High Speed ​​ADC PCB Layout and Wiring Tips." An article written by Rob Reeder**** believes this article will be helpful to everyone's high-speed design projects. Exposed pad The exposed pad (EPAD) is sometimes overlooked, but it is very important for the performance of the signal chain and adequate heat dissipation of the device. The exposed pad, which Analog Devices calls pins 0, is the pad under most of today's devices. It is an important connection where all internal ground of the chip is connected to the center point below the device. I wonder if you have noticed that the lack of ground pins in many converters and amplifiers today is due to the exposed pad. The key is to properly secure (ie, solder) this pin to the PCB for reliable electrical and thermal connections. If this connection is not firm, there will be confusion. In other words, the design may not work. Make the best connection There are three steps to using the exposed pad to achieve the best electrical and thermal connections. First, if possible, the exposed pad should be replicated on each PCB layer. The purpose of this is to form a dense thermal connection with all ground and ground planes for rapid heat dissipation. This step is related to high power devices and applications with a high number of channels. Electrically, this will provide good equipotential bonding for all ground planes. It is even possible to replicate the exposed pad on the bottom layer (see Figure 1), which can be used as a decoupling heat sink ground and where the bottom side heat sink is mounted. Second, divide the exposed pad into multiple identical parts, like a chessboard. Use a screen cross grid on the exposed exposed pad, or use a solder mask. This step ensures a solid connection between the device and the PCB. In the reflow assembly process, it is impossible to determine how the solder paste flows and ultimately connect the device to the PCB. Connections may exist but are unevenly distributed. You may only get one connection, and the connection is small, or worse, at the corner. Dividing the exposed pad into smaller sections ensures that each area has a connection point for a more rugged, uniformly connected exposed pad (see Figure 2 and Figure 3). Finally, you should make sure that all parts have vias connected to ground. Each area is usually large enough to place multiple vias. Before assembly, be sure to fill each via with solder paste or epoxy resin. This step is very important to ensure that the exposed pad solder paste will not reflow into these via holes and affect proper connection. Finally, you should make sure that all parts have vias connected to ground. Each area is usually large enough to place multiple vias. Before assembly, be sure to fill each via with solder paste or epoxy resin. This step is very important to ensure that the exposed pad solder paste will not reflow into these via holes and affect proper connection. Decoupling and layer capacitance Sometimes engineers ignore the purpose of using decoupling, and only distribute a lot of capacitors of different sizes on the board, so that the lower impedance power supply is connected to ground. But the problem remains: how much capacitance is needed? Many related literature indicate that many capacitors of different sizes must be used to reduce the power transmission system (PDS) impedance, but this is not entirely correct. Conversely, simply selecting the correct size and type of capacitor can reduce the PDS impedance. Consider designing a 10 mΩ reference layer as shown in Figure 4. As the red curve shows, many different values ​​of capacitance are used on the system board, 0.001 μF, 0.01 μF, 0.1 μF, and so on. This of course can reduce the impedance in the 500 MHz frequency range, but look at the green curve. The same design uses only 0.1 μF and 10 μF capacitors. This proves that if you use the correct capacitor, you don't need so much capacitance. This also helps to save space and material (BOM) costs. Note that not all capacitors are [born equally", even if the same supplier has different processes, sizes, and styles. If the correct capacitor is not used, whether it is multiple capacitors or several different types, it will have a negative effect on the PDS. The result may be an inductive loop. Improper placement of capacitors or use of different processes and types of capacitors (and therefore different responses to the frequencies within the system) may cause resonances between each other (see Figure 5). It is important to understand the frequency response of the type of capacitor used by the system. The choice of capacitors will make it harder to design low-impedance PDS systems. PDS high-frequency layer capacitance To design a qualified PDS, you need to use a variety of capacitors (see Figure 4). The typical capacitance used on the PCB can only reduce the impedance of the DC or near-DC frequency to about 500 MHz. Above 500 MHz, the capacitance depends on the internal capacitance formed by the PCB. Note that close overlap of the power plane and ground plane will help. A PCB stack structure that supports larger layer capacitors should be designed. For example, a six-layer stack may include a top signal layer, a first ground plane, a first power plane, a second power plane, a second ground plane, and a bottom signal layer. It is specified that the first ground layer and the first power layer are close to each other in the stacked structure, and the two layers have a pitch of 2 to 4 mils to form a natural high-frequency layer capacitance. The biggest advantage of this capacitor is that it is free, just specify in the PCB manufacturing notes. If you have to split the power plane and there are multiple VDD power rails on the same layer, use as large a power plane as possible. Do not leave empty holes and pay attention to sensitive circuits. This will maximize the capacitance of the VDD layer. If the design allows additional layers (in the example above, from six to eight layers), two additional ground planes should be placed between the first and second power planes. In the case where the core pitch is also 2 to 3 mils, the intrinsic capacitance of the laminated structure will be doubled at this time (see Fig. 6 for an example). This structure is easier to design than adding more discrete high frequency capacitors to keep the impedance low at high frequencies. The task of the PDS is to minimize the voltage ripple generated in response to the supply current demand, which is important but often overlooked. All circuits need current, some circuits require more, and some circuits need to provide current at a faster rate. The use of fully decoupled, low-impedance power planes or ground planes, and good PCB stackups help minimize voltage ripple due to circuit current requirements. For example, depending on the decoupling strategy used, if the system design has a switching current of 1 A and the PDS impedance is 10 mΩ, the maximum voltage ripple is 10 mV. The calculation is simple: V = IR. With a perfect PCB stack, it can cover the high frequency range while using conventional decoupling around the power entry starting point and high power or inrush current devices to cover the low frequency range (

Many friends are inevitably trying to solve the problem of heat dissipation on pcb when designing pcb. The heat generated during the operation of the electronic device causes the internal temperature of the device to rise rapidly. If the heat is not dissipated in time, the device will continue to heat up and the device will fail due to overheating, and the reliability of the electronic device will decrease. Therefore, it is very important to dispose the circuit board. The last time a friend of intelligent hardware innovation and entrepreneurship had been tangling pcb thermal problems, the temperature difference between the machine and the shell was quite large. They have been unable to solve, affecting the progress of their product mass production, which needs to solve the problem of pcb heat dissipation. The direct cause of PCB temperature rise is due to the existence of circuit power devices, electronic devices have varying degrees of power consumption, heat intensity varies with the size of power consumption. Two phenomena of temperature rise in printed board: (1) local temperature rise or large area temperature rise; (2) Short-term temperature rise or long-term temperature rise. In the analysis of PCB thermal power consumption, the general analysis from the following aspects. 1, electric power consumption (1) Analyze power consumption per unit area; (2) Analyze the distribution of power consumption on the PCB. 2, the structure of the printed board (1) The size of the printed board; (2) The material of the printed board. 3, the installation of printed boards (1) Installation method (such as vertical installation, horizontal installation); (2) Sealing conditions and distance from the casing. 4, heat radiation (1) The emissivity of the printed board surface; (2) The temperature difference between the printed board and the adjacent surface and their absolute temperature; 5, heat conduction (1) Install a radiator; (2) Conduction of other mounting structures. 6, thermal convection (1) natural convection; (2) Forced cooling convection. The analysis of the above factors from the PCB is an effective way to solve the temperature rise of the PCB. Often these factors are related and dependent on one product and system. Most of the factors should be analyzed according to the actual situation, only for a specific The actual situation can be calculated or estimated more correctly temperature rise and power consumption and other parameters. 12131415161718192021

1.6 screen printed wire sawtooth Screen printed conductors are serrated. The reason for this phenomenon is that when making a screen, the mask is too thin, and the screen image itself has a gap. To avoid this phenomenon, the plate mask must be of appropriate thickness and elasticity, and the high-required image should be made of polyester mesh with a high mesh. The direction of the screen printing wire pattern should be as consistent as possible with the direction of scraping. If the wire is in the direction of the vertical squeegee, it is very easy to produce this phenomenon. In addition, when the net is stretched, the wire direction of the wire mesh is at a certain angle with the frame, and the best angle is 22.5°. Countermeasures: A. Produce high-quality screen images. The edges of screen lines must be stiff. B printed board adsorption of printed materials is better. C printing thixotropic is better The distance between the D screen plate and the printed board and the angle of the scraper blade should be appropriate. E. The screen tension and screen pitch should be appropriate. 1.7 screen printing patterns on the screen pattern The screen printing pattern on the screen printing pattern is mainly because the selected screen mesh is too low, the thixotropy of the printing material is not good, and the drying and curing speed of the printing material is too fast. For this purpose, high-mesh screens can be used to make the screens, with good thixotropic properties and dry and slow printing materials. 1.8 spots Screen printing patterns appear spotted phenomenon and affect the smooth screen printing. The reasons for this phenomenon are: 1.8.1 Screen printing speed and drying of printing materials are too slow 1.8.2 Insufficient solids content 1.8.3 The thixotropy of the printed material is too large 1.8.4 Effect of static electricity 1.8.5 The pigments in the printed material are not uniformly dispersed, and the pigment particles attract and agglomerate to cause color spots. Countermeasures: (1) improve the flow of printed materials, (2) Use a quick solvent with a high volatilization rate, (3) Use high viscosity printing materials, (4) Minimize static electricity as much as possible, and static elimination devices may be used. 1.9 uneven color screen printing graphics The reasons for the uneven screen printing color are various, and in terms of printing materials, the colorants in the printing materials are unevenly distributed, the fineness of the printing material is large, and the printing ink is blotted. To prevent such failures, filter the printed material before screen printing, and fully stir the printed material. 2. Screen failure The screen troubles include the problems caused by the screen editions and the problems caused by the screens in the screen printing process. This article only describes the causes of the screen troubles in the screen printing process and the countermeasures. 2.1 Holes When the new screen version was first used, the printing material was poor, mainly due to the quality of the platemaking. It may be due to masks remaining on the screen. You can use the solvent to scrub the screen plate to remove excess adhesive. If you still cannot use it, you must re-do the screen printing. If screen printing starts with screen printing, the screen coating will gradually thin and pits, and printing will not occur. The reasons for this may be: the printing material is drying too fast, the blocking hole is dried in the screen plate, the printing speed is too fast, and the scraper hardness is too high. In this regard, a solvent with low volatility should be used to adjust the printing material, and the screen plate should be gently scrubbed with a solvent on a soft cloth. After the screen printing is completed, the screen plate must be cleaned with a solvent, otherwise the residual printing material will clog the mesh. . 2.2 screen printing ink During screen printing, the printing material on the screen dripped onto the printed board. The reasons for this failure are: damage to the screen due to scraper pressure, dust, or sundries when there is dust, debris, or miscellaneous materials on the surface of the printed board or in the printed material; in addition, it may be due to masking during screen making. Inadequate exposure of the glue causes the screen mask to be incompletely cured, and the screen is peeled off to form small holes, resulting in ink leakage. In this regard, adhesive tape or tape can be applied to the screen holes, and can also be repaired with screen printing paste. 2.3 Screen damage and precision degradation After long-term use of the screen, the accuracy of the screen will be gradually reduced or damaged even if the screen is of good quality due to abrasion and pressure of the plate. This is determined by the life of the screen. The number of prints (or the length of life) of the screen is closely related to the method of plate-making. The life of the direct screen is longer than that of the inline screen. Under normal conditions, the direct screen version can withstand 2 to 30,000 prints. In general, mass production uses direct legal screens. The direct process plate uses a water-soluble photosensitive resin emulsion having good water resistance and solvent resistance after curing. In the rainy season, due to the dampness of the air, the quality and service life of the direct legal plate are easily affected. The damage of the indirect screen plate was not peeled off from the screen and it was peeled away from the screen by erosion. The direct and indirect method of making screen plate, mask thickness and thickness can be set uniform, so the edge of the image is clear, but in the heating process film film and the edge of the screen shrink is not consistent, the solution is to apply a direct legal system around the photosensitive adhesive When covering the film film, if there is dust in the middle of the screen and the photosensitive film, it will cause poor adhesion between the partial photosensitive film and the screen, which will affect screen printing quality and service life. The countermeasure is to wipe the film with antistatic cloth before sticking the film. Diaphragm. 2.4 Printing pressure caused by excessive failure During screen printing, the force applied to the squeegee produces a press pressure, the purpose of which is to make the screen plate in line contact with the printed board, and the squeegee scrapes the printed material to form an image through the screen. The size of the press pressure depends on the screen tension, the length of the squeegee, the distance between the screen and the printed board (net distance). The high pressure of the scraper not only results in a large amount of printed material, but also a large printing pressure, which causes the scraper to be bent and deformed, which in turn reduces the throughput of the printed material, and even makes the screen and the printed board not in contact with each other and become surface contact. Not only can you not print clear images, but it can also cause scrape wear and screen mask peeling, web stretching, and image distortion. (to be continued) 567891011121314

PCB numerical control drilling and milling machine is a typical point motion control system. It is the key equipment for the precision conduction hole processing of printed circuit boards. With the development of electronic products in the direction of miniaturization and miniaturization, the requirements for the aperture, line width, and line spacing of the vias are increasing. Correspondingly, the PCB numerical control system is developing in an open direction with high speed, high precision, high reliability, system integration, flexibility, and high intelligence. MPC08 economical four-axis motion controller is widely used in PCB numerical control drilling machines for its excellent performance. First of all, the movement mode of the PCB numerically controlled drilling machine is mainly point motion. Its key technical indicators require high speed and high precision. MPC08 mainly completes the point motion control, can quickly and accurately locate and drill in the instant, and then can quickly move to the next positioning hole on the side after leaving the PCB board surface after lifting, thus greatly improving the work efficiency of the PCB digital drilling machine. . The maximum output frequency of MPC08 is 4MHZ to meet the high speed requirements of PCB drilling machines. Second, the PCB drilling machine requires a large number of IO channels to monitor various device states and control output signals, and each MPC08 motion control card can control 16 universal inputs and 16 general-purpose outputs, while there are 17 dedicated input channels, also when not needed. Can be used as a universal input channel to fully meet the PCB drilling machine I / O channel requirements. In addition, MPC08 also provides users with a secondary development interface to meet the needs of the user's special function development.

There are many ways to solve EMI problems. Modern EMI suppression methods include: using EMI suppression coatings, selecting suitable EMI suppression components, and EMI simulation designs. This article starts from the most basic PCB layout, discusses the role and design skills of PCB layered stacking in controlling EMI radiation. Power bus Properly placing a capacitor of appropriate capacity near the power supply pin of the IC can make the output voltage of the IC jump faster. However, the problem is not here. Due to the finite frequency response of the capacitor, this makes it impossible for the capacitor to generate the harmonic power required to cleanly drive the IC output over the full frequency band. In addition, the transient voltage developed on the power bus forms a voltage drop across the inductor of the decoupling path, which is the primary source of common-mode EMI interference. How should we solve these problems? As far as the ICs on our boards are concerned, the power plane around the IC can be thought of as an excellent high-frequency capacitor that collects the energy that is leaked by discrete capacitors that provide high-frequency energy for clean outputs. In addition, the excellent power supply layer has a small inductance, so that the transient signal synthesized by the inductor is also small, thereby reducing common mode EMI. Of course, the wiring from the power plane to the IC power supply pin must be as short as possible because the rising edge of the digital signal is getting faster and faster, preferably directly to the pad where the IC power supply pin is located. This is discussed separately. To control common-mode EMI, the power plane must be decoupled and have a low enough inductance. This power plane must be a well-designed pair of power planes. Someone may ask, to what extent is it good? The answer to the question depends on the layering of the power supply, the material between the layers, and the operating frequency (ie, the function of the rise time of the IC). Typically, the power supply is layered at 6 mils and the mezzanine is FR4. The equivalent capacitance per square inch of power plane is approximately 75 pF. Obviously, the smaller the layer spacing, the larger the capacitance. There are not many devices with a rise time of 100 to 300 ps, but according to the current development speed of ICs, devices with a rise time of 100 to 300 ps will occupy a high proportion. For circuits with 100 to 300 ps rise time, the 3 mil layer spacing will no longer be suitable for most applications. At that time, it was necessary to use a layering technique with a layer spacing of less than 1 mil and to replace the FR4 dielectric material with a material having a high dielectric constant. Ceramics and ceramics now meet the design requirements of 100 to 300 ps rise time circuits. Although new materials and methods may be used in the future, for today's common 1 to 3 ns rise time circuits, 3 to 6 mil layer spacing and FR4 dielectric materials, it is usually sufficient to handle high-end harmonics and make the transient signal low enough. That said, common mode EMI can be reduced very low. The PCB layered stack design example given here will assume a layer spacing of 3 to 6 mils. Electromagnetic shielding From the perspective of signal routing, a good stratification strategy should be to place all signal traces in one or several layers, which are next to the power or ground plane. For the power supply, a good stratification strategy should be that the power layer is adjacent to the ground plane, and the distance between the power plane and the ground plane is as small as possible. This is what we call the "layering" strategy. Solving EMI problems by layered stacking of PCBs in PCB layout PCB stacking What kind of stacking strategy helps shield and suppress EMI? The following layered stacking scheme assumes that the supply current flows on a single layer, with single or multiple voltages distributed across different parts of the same layer. The case of multiple power planes is discussed later. 4-layer board There are several potential problems with 4-layer board design. First, the conventional four-layer board with a thickness of 62 mil, even if the signal layer is on the outer layer, the power supply and the ground layer are in the inner layer, the distance between the power supply layer and the ground layer is still too large. If the cost requirement is first, consider the following two alternatives to traditional 4-layer boards. Both of these solutions improve EMI suppression performance, but only for applications where the on-board component density is low enough and there is sufficient area around the component to place the required copper layer on the power supply. The first is the preferred solution. The outer layers of the PCB are all ground layers, and the middle two layers are signal/power layers. The power supply on the signal layer is routed with a wide line, which allows the path impedance of the supply current to be low and the impedance of the signal microstrip path to be low. From the perspective of EMI control, this is the best 4-layer PCB structure available. The outer layer of the second scheme takes the power and the ground, and the middle two layers take the signal. Compared with the traditional 4-layer board, the improvement is smaller, and the interlayer resistance is as poor as the traditional 4-layer board. If you want to control the trace impedance, the above stacking scheme must be very careful to place the traces under the power and ground copper islands. In addition, the copper or copper islands on the ground should be interconnected as much as possible to ensure DC and low frequency connectivity. 6-layer board If the density of the components on the 4-layer board is relatively large, it is preferable to use a 6-layer board. However, some laminate solutions in the 6-layer board design do not have a good shielding effect on the electromagnetic field, and have little effect on the reduction of the power bus bus transient signal. Two examples are discussed below. In the first case, the power and ground were placed on the 2nd and 5th layers respectively. Due to the high impedance of the copper of the power supply, it is very disadvantageous for controlling the common mode EMI radiation. However, from the point of view of signal impedance control, this method is very correct. In the second example, the power supply and the ground are placed on the 3rd and 4th layers respectively. This design solves the problem of the copper-clad impedance of the power supply. Due to the poor electromagnetic shielding performance of the first layer and the sixth layer, the differential mode EMI is increased. This design can solve the differential mode EMI problem if the number of signal lines on the two outer layers is the least and the trace length is short (shorter than the 1/20 of the highest harmonic wavelength of the signal). The suppression of differential mode EMI is particularly good when copper is filled with no components and no trace areas on the outer layer and the copper area is grounded (interval every 1/20 wavelength). As mentioned earlier, the copper area is connected to the internal ground plane at multiple points. The general-purpose high-performance 6-layer board design generally lays the first and sixth layers as the ground layer, and the third and fourth layers take the power and ground. Since there are two layers of the centered double microstrip signal line layer between the power supply layer and the ground layer, the EMI suppression capability is excellent. The disadvantage of this design is that the trace layer has only two layers. As mentioned earlier, if the outer traces are short and copper is laid in the no trace area, the same stack can be achieved with a conventional 6-layer board. Another 6-layer board layout is signal, ground, signal, power, ground, and signal, which enables the environment required for advanced signal integrity design. The signal layer is adjacent to the ground layer, and the power layer and the ground layer are paired. Obviously, the downside is that the stacking of layers is unbalanced. This usually causes troubles in manufacturing. The solution to the problem is to fill all the blank areas of the third layer with copper. If the copper layer density of the third layer is close to the power layer or the ground layer after copper filling, the board can not be strictly regarded as a structurally balanced circuit board. . The copper filled area must be connected to power or ground. The distance between the connecting vias is still 1/20 wavelength, and it is not necessary to connect everywhere, but ideally it should be connected. 10-layer board Since the insulating isolation layer between the multilayer boards is very thin, the impedance between the 10 or 12 layer circuit board layers and the layers is very low, and excellent signal integrity is completely expected as long as the layering and stacking are not problematic. It is difficult to process 12-layer boards at a thickness of 62 mils, and there are not many manufacturers that can process 12-layer boards. Since the signal layer and the loop layer are always separated by an insulating layer, the scheme of distributing the middle 6 layers in the 10-layer board design to take the signal line is not optimal. In addition, it is important to have the signal layer adjacent to the loop layer, that is, the board layout is signal, ground, signal, signal, power, ground, signal, signal, ground, and signal. This design provides a good path for signal current and its loop current. The proper routing strategy is that the first layer is routed along the X direction, the third layer is routed along the Y direction, the fourth layer is routed along the X direction, and so on. Intuitively looking at the traces, the first layer 1 and the third layer are a pair of layered combinations, the fourth layer and the seventh layer are a pair of layered combinations, and the eighth layer and the tenth layer are the last pair of layered combinations. When it is necessary to change the direction of the trace, the signal line on the first layer should be changed direction by "via" to the third layer. In fact, it may not always be possible to do so, but as a design concept, try to comply as much as possible. Similarly, when the direction of the signal is changed, it should pass through the vias from the 8th and 10th layers or from the 4th to the 7th. This routing ensures that the coupling between the forward path and the loop of the signal is tightest. For example, if the signal is routed on the first layer and the loop is on the second layer and only on the second layer, then the signal on the first layer is transferred to the third layer even by "via". The loop is still on the second layer, maintaining low inductance, large capacitance characteristics and good electromagnetic shielding performance. What if the actual route is not the case? For example, the signal line on the first layer passes through the via hole to the 10th layer. At this time, the loop signal has to find the ground plane from the 9th layer, and the loop current needs to find the nearest ground via (such as the grounding pin of the component such as resistor or capacitor). . If there is such a via in the vicinity, it is really lucky. If no such via is available, the inductance will increase, the capacitance will decrease, and EMI will increase. When the signal line must leave the current pair of wiring layers through the via to other wiring layers, the ground via should be placed near the via, so that the loop signal can be smoothly returned to the proper ground plane. For Layer 4 and Layer 7 layered combinations, the signal loop will be returned from the power or ground plane (ie, Layer 5 or Layer 6) because the capacitive coupling between the power and ground planes is good and the signal is easily transmitted. . Multi-power layer design If two power planes of the same voltage source need to output a large current, the board should be laid into two sets of power and ground planes. In this case, an insulating layer is placed between each pair of the power supply layer and the ground layer. This gives us two pairs of equal-impedance power buss that we want to divide the current. If the stack of power planes causes unequal impedances, the shunt is not uniform, the transient voltage will be much larger, and EMI will increase dramatically. If there are multiple supply voltages with different values on the board, multiple power planes are required accordingly. It is important to remember to create separate pairs of power and ground planes for different power supplies. In both cases, when determining the location of the paired power and ground planes on the board, remember the manufacturer's requirements for the balanced structure. to sum up Given that most engineers design boards that are 62 mils thick and have no blind vias or buried vias, the discussion of board delamination and stacking is limited to this. For boards with too much thickness difference, the layering scheme recommended in this paper may not be ideal. In addition, the processing method of the circuit board with blind holes or buried holes is different, and the layering method of this paper is not applicable. The thickness, via process, and number of layers in the board design are not critical to solving the problem. Excellent layered stacking ensures bypass and decoupling of the power busbars and minimizes transient voltages on the power or ground plane. The key to shielding the signal and the electromagnetic field of the power supply. Ideally, there should be an insulating isolation between the signal trace layer and its return ground plane, and the matching layer spacing (or more than one pair) should be as small as possible. Based on these basic concepts and principles, it is possible to design a board that always meets the design requirements. Now, IC's rise time is already short and will be shorter, and the techniques discussed in this article are essential to address EMI shielding issues. 12345678910 © 2009-2019 Powered by Bossgoo.com

What is PCB? PCB (PrintedCircuitBoard), Chinese name is printed circuit board, also known as printed circuit board, printed circuit board, is an important electronic component, is the support of electronic components, is the provider of electrical connections of electronic components. Because it is made by electronic printing, it is called a "printing" circuit board. In the PCB industry, resin PCB, metal PCB, ceramic PCB, which is the cheapest resin, the most expensive ceramic, then where is the ceramic expensive? First, follow the small series to understand the ceramic substrate, then analyze and introduce the ceramic PCB in the end? Domestic ceramic PCB is heating up _ Where is the ceramic PCB board? Ceramic substrate The ceramic substrate refers to a special process plate in which a copper foil is directly bonded to a surface of an alumina (Al 2 O 3 ) or aluminum nitride (AlN) ceramic substrate (single or double sided) at a high temperature. The ultra-thin composite substrate produced has excellent electrical insulation properties, high thermal conductivity, excellent solderability and high adhesion strength, and can etch various patterns like a PCB board, and has a large current carrying capacity. ability. Therefore, ceramic substrates have become the basic material for high-power power electronic circuit structure technology and interconnection technology. Ceramic substrate characteristics 1, strong mechanical stress, stable shape; high strength, high thermal conductivity, high insulation; strong bonding, anti-corrosion. 2, excellent thermal cycle performance, cycle times up to 50,000 times, high reliability. 3. Like the PCB board (or IMS substrate), the structure of various graphics can be etched; no pollution, no pollution. 4, the use of wide temperature -55 ° C ~ 850 ° C; thermal expansion coefficient close to silicon, simplifying the production process of power modules. Domestic ceramic PCB is heating up _ Where is the ceramic PCB board? Advantages of ceramic substrates 1. The thermal expansion coefficient of the ceramic substrate is close to that of the silicon chip, which can save the transition layer Mo film, save labor, material and reduce cost; 2. Reduce the solder layer, reduce the thermal resistance, reduce the void, and improve the yield; 3. The line width of 0.3mm thick copper foil under the same current carrying capacity is only 10% of the ordinary printed circuit board; 4, excellent thermal conductivity, the chip package is very compact, so that the power density is greatly improved, improving the reliability of the system and device; 5, ultra-thin (0.25mm) ceramic substrate can replace BeO, no environmental toxicity problems; 6, the current carrying capacity is large, 100A current continuously through 1mm wide and 0.3mm thick copper body, the temperature rise is about 17 °C; 100A current continuously through 2mm wide and 0.3mm thick copper body, the temperature rise is only about 5 °C; 7. Low thermal resistance, thermal resistance of ceramic substrate of 0.6×mm thickness of 10×10mm ceramic substrate is 0.31K/W, thermal resistance of ceramic substrate with thickness of 0.38mm is 0.19K/W, ceramic substrate of 0.25mm thickness The thermal resistance is 0.14K/W. 8. High insulation withstand voltage to ensure personal safety and equipment protection. 9. New packaging and assembly methods can be realized to make the product highly integrated and compact. Domestic ceramic PCB is heating up _ Where is the ceramic PCB board? The difference between ceramic substrate and ordinary pcb board A comparison of the material of the pcb board itself on the market The FR-4 board is the most widely used on the market today, but the defects of the FR-4 board are irreversible. The experience of Slyton's technical staff in making boards for many years made a simple analysis of the boards on the market. Advantages of FR-4 CCL: 1, no insulation layer 2, mass production 3, forming fast 4, the price is low There are almost 12 types of defects: 1. The thickness difference is more common in the middle and thicker sides, or one side is thick and thin on one side. It will affect the processing of the pcb, and uneven thickness will affect the depth of the groove. Substrate resistance. For the more precise printed circuit boards, the thick plate is too poor, which will cause the plugs to be tight and the contact is poor. Affect the performance of electronic devices. For multilayer printed circuit boards. The accumulation of thickness excess may cause a whole lot of pieces, and the thickness of the board is too bad, resulting in waste. Can not meet the test platform and other high-precision products on the high-pressure plate thickness tolerance requirements. 2, substrate embossing: affecting the substrate solder resistance, electrical insulation and many other properties, can not be used genuinely. 3. Substrate stratification: It is not impossible to apply this phenomenon, but it cannot be a Class A product. 4, the substrate white spots. White lines: seriously affect the quality of pcb manufacturing 5, the substrate exposed cloth pattern: caused the insulation performance to decline, seriously affecting the quality of pcb board 6, substrate impurities. Black spots: affecting the appearance of the product, there are other effects, what you can do now is 7, copper foil wrinkles: This kind of crease is not allowed to use in pcb production 8. Glue point: It is a resin that has been cured. Corrosion does not occur during the production process. Seriously affect the insulation between the wires. Therefore, it cannot be used for pcb production. 9. Pit: It has a great impact on the quality of pcb products, which may cause the line to be unreachable or unreasonable. 10, pinhole: will cause a thick picture, there are traces of kerosene leakage. 11, copper foil oxidation: slight oxidation will not affect the quality of pcb products, but should also be prevented. Severe oxidation may cause the pcb manufacturing process to be less corrosive and cannot be used for CCL production. 12, copper foil highlights: This point due to the destruction of the oxidation layer, the product is easily oxidized during storage, causing adverse effects on pcb. For larger highlights, copper tin may be thinner than other places, and it will also affect the manufacturing quality of pcb. Ceramic circuit board advantages: 1. High resistance 2. High frequency characteristics 3. High thermal conductivity 3. Good chemical stability. Anti-seismic, heat-resistant, withstand voltage, internal circuit, MARK point, etc. are better than general circuit boards. 4. Precise in printing, patching and welding Disadvantages of ceramic circuit boards: 1, fragile: This is one of the most important shortcomings, currently only a small area of ​​the circuit board. 2, the price is expensive: the requirements of electronic products are more and more, the ceramic circuit board is only satisfied to meet some of the higher-end products, the low-end products will not be used at all. Domestic ceramic PCB is heating up _ Where is the ceramic PCB board? Where is the ceramic PCB board? PCB is different from the clothes and shoes that we usually buy. It is an intrinsic, invisible thing. Usually buy luxury goods, are visible and tangible, you can harvest countless envious sunshine, but ceramic PCB you use or not, in the eyes of consumers, there is basically no difference, the soft quality of electrical appliances is invisible of. Then the question comes, where is the ceramic PCB board expensive? They are analyzed from the following three aspects: Domestic ceramic PCB is heating up _ Where is the ceramic PCB board? 1. Substrate material: Ceramic PCB is currently mainly made of aluminum oxide aluminum nitride. The cost of these two materials is much more expensive than resin substrates or aluminum substrates and copper substrates. Starting from the substrate, the price has already been opened. 2, process technology: From the manufacturing process, whether it is LTCC, HTCC, DPC, DBC or LAM, its manufacturing process will require higher, the co-firing temperature of LTCC and HTCC demand is difficult to control. 3, product performance: As the saying goes, "a piece of money for a piece of goods", this sentence is displayed on the ceramic PCB, the PCB has many important needs, such as thermal conductivity, thermal expansion coefficient, dielectric constant, stability, high Frequency loss, etc. In these respects, ceramic PCBs can achieve the current state of the art. Its thermal conductivity is the best among PCBs, its thermal expansion coefficient is also more compatible with silicon chips, its dielectric constant is very low, its electrical conductivity is excellent, its corrosion resistance, high temperature resistance and high frequency loss are small. Having said that, it can be seen that the ceramic PCB is not unreasonable. Although consumers can't see it, even if they don't understand it, the quality can be felt. Life, stability, and not easy to break can reflect the quality of the product, it is these qualities that will attract today's consumers. Purely on the price war, there is no way to capture thousands of consumers. Looking at the world, ceramic PCB has been applied for half a century, but the domestic ceramic PCB has just emerged, because of technology and other reasons, still rely heavily on imports to maintain domestic production. The research and development of ceramic PCBs by domestic new technology companies has never stopped. For example, Slyton and other companies that are trying to make China catch up with the world have the same heart with the country and keep moving forward. In the future, more technologies will be added to make it more efficient, and the cost control will be more precise. At that time, Chinese ceramic PCB will resound the world. Domestic ceramic PCB is heating up _ Where is the ceramic PCB board? 12345678910

The most basic purpose of PCB surface treatment is to ensure good solderability or electrical properties. Since copper in nature tends to exist in the form of oxides in the air, it is unlikely to remain as raw copper for a long time, so other treatments of copper are required. 1, hot air leveling (spray tin) hot air leveling, also known as hot air solder leveling (commonly known as spray tin), it is coated with molten tin (lead) solder on the surface of the PCB and heated (compressed) with heating air to make the flat process It forms a coating that is both resistant to copper oxidation and provides good solderability. When the hot air is leveled, the solder and copper form a copper-tin intermetallic compound at the junction. The PCB is sunk in the molten solder during hot air leveling; the air knife blows the liquid solder before the solder solidifies; the air knife minimizes the meniscus of the solder on the copper surface and prevents solder bridging. 2. Organic Solderability Protector (OSP) OSP is a process that meets the requirements of the RoHS Directive for printed circuit board (PCB) copper foil surface treatment. OSP is the abbreviation of Organic Solderability Preservatives. Chinese translation is organic solder mask, also known as copper protector. It is also known as Preflux in English. Simply put, OSP chemically grows an organic film on a clean bare copper surface. This film has anti-oxidation, thermal shock resistance and moisture resistance. It is used to protect the copper surface from rust (oxidation or vulcanization) in the normal environment. However, in the subsequent high temperature of welding, the protective film must be very It is easily removed by the flux, so that the exposed clean copper surface can be immediately combined with the molten solder into a firm solder joint in a very short time. 3, full plate nickel-plated gold Nickel plated gold is plated with a layer of nickel on the surface conductor of the PCB and then plated with a layer of gold. The nickel plating is mainly to prevent the diffusion between gold and copper. There are two types of electroplated nickel gold: gold-plated gold (pure gold, the gold surface does not look bright) and hard gold (the surface is smooth and hard, wear-resistant, contains other elements such as cobalt, and the gold surface looks brighter). Soft gold is mainly used for gold wire bonding in chip packaging; hard gold is mainly used for electrical interconnection in non-welded parts. 4, Shen Jin Shen Jin is a thick layer of nickel-gold alloy wrapped on the copper surface, which can protect the PCB for a long time; in addition, it also has environmental tolerance not available in other surface treatment processes. In addition, immersion gold can also prevent the dissolution of copper, which will benefit lead-free assembly. 5. Tin Tin Since all current solders are based on tin, the tin layer can be matched to any type of solder. The immersion tin process can form a flat copper-tin intermetallic compound. This property makes the immersion tin have the same good solderability as the hot air leveling without the hot air leveling headache. The slab can not be stored for too long. The assembly must be carried out according to the order of the tin. 6. The process of sinking silver and silver is between organic coating and electroless nickel/immersion gold. The process is relatively simple and fast. Even when exposed to heat, humidity and pollution, silver can maintain good solderability. But it will lose its luster. Silver does not have the good physical strength of electroless nickel/immersion gold because there is no nickel under the silver layer. 7. Chemical Nickel Palladium Gold Chemical Nickel Palladium is a layer of palladium between nickel and gold compared with immersion gold. Palladium can prevent corrosion caused by displacement reaction and is fully prepared for Shenjin. Gold is tightly covered on top of the palladium to provide a good contact surface. 8, electroplating hard gold in order to improve the wear resistance of the product, increase the number of insertions and plating hard gold. 12345678910

PCB circuit board equipment, circuit board wet process production line includes (sand blasting machine, volcanic ash mill, vacuum etching machine, sink tin production line, anti-oxidation line. Inner layer development time continuous film removal machine, outer continuous release film Tin retreat machine, fpc development time with film removal machine, browning machine, dry film / wet film development machine, copper reduction machine, coarse grinding machine, pickling grinding machine, copper plate engraving machine, welding machine, ultra high pressure Washing machine, ultrasonic cleaning machine, finished washing machine, chemical washing machine, sprayed tin processing machine). The diaphragm pressure gauges provided by the wet process equipment are mostly selected by the largest PCB equipment factory in China. One-piece PP diaphragm pressure gauge has its special integrated shape. Effectively avoid the leakage of oil caused by too many instrument seams. This design has better instrument sealing and aesthetics than the earlier protective cover separate diaphragm pressure gauge and the PP head split diaphragm pressure gauge. At present, Taiwan's SKON brand and Dongguan Yade Instrument's PP diaphragm pressure gauge are all models. In addition, a safety protection buckle is added to the design of the pressure gauge table frame, which effectively controls the looseness of the pressure gauge and the manual twisting. However, with the improvement of the circuit board technology and the increase of the PH value and the pH value of the chemical solution in the wet process line, the existing fluorinated rubber diaphragm can no longer meet the requirements of the equipment and is resistant to strong acids and alkalis. Diaphragm pressure gauges are the best choice for wet process equipment. At present, for technical reasons, only Taiwan Huashi STIKO brand and Dongguan Yade Instrument's PP diaphragm pressure gauges have used Teflon diaphragm diaphragm diaphragm pressure diaphragm material. Taiwan SHIKO Brand STIKO brand PP diaphragm pressure gauge is the earliest and most mature professional pressure gauge supplier in China. Yade Instrument has experienced the replacement of PP diaphragm pressure gauges since it produced PP diaphragm pressure gauges. And in the innovation mastered the mature Teflon Diaphragm diaphragm pressure gauge technical improvements and production and processing. As one of the leading brands of diaphragm pressure gauges in the market, Yade Instrument always serves its customers and markets in a dedicated and professional manner.

1. PCB ink prices continue to decline With the rise of China`s PCB status in the world, the price of domestic PCBs has continuously dropped by 4 to 5 times in recent years, and SMEs are the most affected. In the case of falling PCB prices, the prices of raw materials and auxiliary materials used for printing are correspondingly reduced, and the situation of falling prices is basically the same as that of PCB. 2. Application of light-imaging corrosion resisting plating ink In view of the fact that the price of photoimaging etching resist plating ink is significantly lower than that of dry film (about 2-3 times), and the utilization rate is as high as 95%, and there is no need to increase investment in any equipment and plant, so in recent years, many manufacturers Rapidly using dry film instead of photoimaging resist plating ink. After a period of time, due to the substantial reduction in costs and the shortened production cycle, many multi-layer mills also used this ink to complete the processing of the inner plates and received satisfactory results. Some large-scale double-faced manufacturing plants also use the automatic line production method of double-sided roll-coating into the drying tunnel to obtain a multiplier effect. So far, the application of this ink has basically spread to SMEs. With the inward migration of printing plates factories in Hong Kong and Taiwan, some advanced coating methods (such as spraying, electrostatic spraying, dip coating, etc.) have also been introduced to mainland China, and the application and promotion of photoimaging resist plating inks A great promotion. 3. Commercialization of screen printing resist ink Ink printers saw a strong business opportunity in China's PCB ink market. They soon introduced screen printing resist inks of various types and different properties to form a printing plate ink market. Hong Kong, Japan, and the United States also pushed our company's PCB screen printing resist ink to China as quickly as possible, and established a joint venture company. These brands of inks have stable performance and are easy to use. The most prominent feature is the fading ink process. There has been a great improvement - the use of alkaline solution to remove ink, eliminating the need for solvent cleaning and solvent pollution. With the increase of TV boards and recorder boards, UV-cured resist screen printing inks have come out, which has significantly accelerated the production of PCB plating inks. After a period of time, due to the substantial reduction in costs and the shortened production cycle, many multi-layer mills also used this ink to complete the processing of the inner plates and received satisfactory results. Some large-scale double-faced manufacturing plants also use the automatic line production method of double-sided roll-coating into the drying tunnel to obtain a multiplier effect. So far, the application of this ink has basically spread to SMEs. With the inward migration of printing plates factories in Hong Kong and Taiwan, some advanced coating methods (such as spraying, electrostatic spraying, dip coating, etc.) have also been introduced to mainland China, and the application and promotion of photoimaging resist plating inks A great promotion.